MA3690/1/3
MA3690/1/3
1553B Bus Controller/Remote Terminal
Replaces June 1999 version, DS3587-4.0
DS3587-5.0 January 2000
The MA3690/1 chip set has three modes of operation:
remote terminal, bus controller, and passive monitor It has a
dual bus capability, requires minimum support hardware /
software and is implemented on a radiation hard, CMOS/SOS
process. For applications requiring access to Terminal Flag, a
48-Pin DIL MA3693 is available as an alternative to the
MA3690.
As a remote terminal, the MA3690/1 is fully compatible with
Mil-Std-1553B. The chip set obtained SEAFAC approval in
December 1987. All options and mode commands specified by
the Mil Std are implemented Full and meaningful use is made
of status word bits and a comprehensive bit word is provided.
A unique mechanism has been incorporated that allows
the subsystem to declare illegal commands legal, and vice
versa, before the chip set services the command. It should be
noted that use of this mechanism is optional and that the
system defaults to normal operation if the option is not
required. The chip set is easily interfaced to subsystem
memory and is sufficiently flexible to ensure compatibility with
a wide range of microprocessors.
As a bus controller the MA3690/1 has the ability to initiate
all types of 1553B transfer on either of the two buses An
instruction word is set up by the subsystem, prior to
transmission, which contains details of transfer type and bus
selection. Four bits of the instruction word have been used to
specify the conditions under which the chip set will generate a
subsystem interrupt. The most significant bits of the instruction
word have been used to specify the conditions under which the
chip set will perform an automatic retry and the number of
retries to be carried out (max. 3). At the end of each instruction
execution cycle, the chip set writes a report word into the
subsystem memory; the contents of which give the subsystem
an indication of the degree of success of the transfer.
The bus controller may be used in either of two
configurations, i.e. single shot or table driven.
In the single shot configuration, the controller is under
direct control from the subsystem (processor). In table driven
configuration, the controller is given greater autonomy to
execute a table of instructions held in either ROM or RAM.
As a passive monitor, the chip set will monitor all bus
activity and pass any associated information to the subsystem.
As the name implies, in this mode of operation, the chip set is
truly passive and will not reply to command instructions.
FEATURES
s
Radiation Hard to 1MRads (Si)
s
High SEU Immunity, Latch-Up Free
s
CMOS-SOS Technology
s
All Inputs and Outputs Fully TTL or CMOS Compatible
s
Military Temperature Range -55 to +125°C
s
Dual Bus Capability
s
Minimal Subsystem Interface
s
Powerful Bus Control Facility
s
Complete Remote Terminal Protocol
s
SEAFAC Approved
SIGNAL DESCRIPTIONS
All signals are TTL compatible unless stated otherwise. An
‘N’ at the end of the signal name denotes an active low signal.
SUPPLIES
VDD
VSS
5 volts positive supply
Ground
CLOCK INPUTS
CK12
12MHz clock
BUS INTERFACE LINES
PDIN0
Input
Positive threshold exceeded on bus 0.
NDIN0
Input
Negative threshold exceeded on bus 0.
TXEN0N
Output
Transmit enable for driver on bus 0.
PDOUT0N
Output
Positive Manchester data for driver on bus 0.
1/41
MA3690/1/3
NDOUT0N
Output
Negative Manchester data for driver on bus 0.
PDIN1
Input
Positive threshold exceeded on bus 1.
NDIN1
Input
Negative threshold exceeded on bus 1.
TXEN1N
Output
Transmit enable for driver on bus 1.
PDOUT1N
Output
Positive Manchester data for driver on bus 1.
NDOUT1N
Output
Negative Manchester data for driver on bus 1.
ADENN
Output
ADDRESS ENABLE - When in RT mode this line will go low
as part of the reset routine to enable the terminal address on
to the data highway.
SYNCN
Output
SYNCHRONISE - This line will pulse low if a valid
synchronise mode command without data is received and
passes all validity checks.
STATENN
Output
STATUS ENABLE -
RT: When low this line enables the contents of the
subsystem status latch on to the data highway.
BC: When low this line enables the BC report word on to the
data highway.
MDRN
Output
MODE DATA RECEIVED - This line will pulse low to
inform the subsystem that the received mode data is
valid and may be used.
RXCMDN
Output
RECEIVED COMMAND -
RT: This line goes low to indicate that a valid command word
for this RT is on the highway and should be written into the
command word latch.
BC: When operating as a passive monitor this line goes low
to indicate that a valid command / status word is on the data
highway and should be written into the received status latch.
BUSYREQN / HALTREQN
Input
BUSY REQUEST / HALT REQUEST -
RT: This line should be driven low as a request for the
terminal to set the busy bit and inhibit non mode data
transfers to or from the subsystem.
BC: This line should be driven low as a request for the
terminal to halt table execution and all subsystem access.
BUSYACKN / HALTEDN
Output
BUSY ACKNOWLEDGE / HALTED -
RT: This line will go low to indicate that the subsystem has
free access to the shared store.
BC: This line will go low to indicate that all terminal operation
has been halted and hence the subsystem has free access to
the shared store.
CODENN
Output
CODE ENABLE - This line when low indicates that a
word transfer between the terminal and either the
Instruction Store or the Report Store is taking place.
C0
Output
CODE 0 - This line is the least significant address line from
the terminal to the Instruction and Report Stores.
SUBSYSTEM INTERFACE LINES
STROBEN
Output
STROBE - Information transfer strobe pulse for words being
transferred on the data highway.
BUFENN
Output
BUFFER ENABLE - This line goes low to enable the data
highway buffer between the terminal and the subsystem.
R/WN
Output
READ/WRITE - This line indicates the direction of information
transfer between the terminal and the subsystem. When low,
information is being written from the terminal to the
subsystem.
DTRQN
Output
DATA TRANSFER REQUEST - This line goes low to request
permission to transfer a non mode data word to or from the
subsystem.
DTAKN
Input
DATA TRANSFER ACKNOWLEDGE - This line should be
driven low to grant permission to perform the requested data
word transfer.
MDTN
Output
MODE DATA TRANSFER -
RT: This line goes low to indicate that the data word being
transferred is assosiated with a mode command.
BC: When operating as a passive monitor this line goes low
to indicate that a valid data word is on the data highway and
should be written into the received data latch.
GBRN
Output
GOOD BLOCK RECEIVED - When in RT mode this line will
pulse low to inform the subsystem that the received non
mode data words are valid and may be used.
C1
Output
CODE 1 - This line is the least significant but one address
line from the terminal to the Instruction and Report Stores.
2/41
MA3690/1/3
INCADRN
Output
INCREMENT ADDRESS - This line pulses low to increment
the external instruction addressing counter.
HSFN/IRQN
Output
HANDSHAKE FAIL / INTERRUPT REQUEST
RT: This line pulses low to inform the subsystem that it has
not responded to a data transfer request to take place.
BC: This line pulses low to generate an interrupt to the BC
subsystem processor.
INCMDN
Output
IN COMMAND - When low this line indicates that the terminal
is currently servicing a command word.
EOTN
Output
END OF TRANSMISSION - When low this line indicates that
the selected bus is quiet and hence available for use.
ABORTN
Output
This line will pulse low to abort execution of the current
command if an error is detected.
B0-B15
Input/Output
HIGHWAY LINES - 16 line bidirectional Output data highway.
(B0 = LSB).
CLDN
Inter-chip (CMOS)
COMMAND LOAD - When low this line indicates that the
word on the data highway should be loaded into the
transmitter for transmission with a command sync.
DLDN
Inter-chip (CMOS)
DATA LOAD - When low this line indicates that the word on
the data highway should be loaded into the transmitter for
transmission with a data sync.
OBFN
Inter-chip (CMOS)
OUTPUT BUFFER FULL - When low this line indicates that
the transmitter output buffer is full and cannot be overwritten.
VALDRN
Inter-chip (CMOS)
VALID DATA RECEIVED - When low this line indicates that a
valid data word has been received and is on the data
highway.
VALCRN
Inter-chip (CMOS)
VALID COMMAND RECEIVED -
RT: When low this line indicates that a valid command word
for this RT has been received.
BC: When low this line indicates that a valid word with a
command sync has been received.
RT/BCN
Input
REMOTE TERMINAL/BUS CONTROLLER - When high the
terminal will function as an RT.When low the terminal will
function as a bus controller.
CK4
Output
4MHz system clock.
PUCN
Input
POWER UP CLEAR - This line should be pulsed low
following power-up.
RESETN
Input/Output
RESET - This line when low, forces the internal circuitry to
reset to the quiescent initialised state. This is a ‘TTL’ level
input on both devices and an open-drain output on the
MA3690. The subsystem should drive this line via an open
drain/collector device with external pull up fitted.
RT0 / RT1
Inputs
REPLY TIMEOUT DECODE - These lines on the MA3690
allow four different timeout values to be used. On the
MA3693, the RT1 signal is not available and is pulled down
internally.
RT1
0
0
1
1
RT0
0
1
0
1
Timeout (us)
16
22
44
108
Note: Under normal operation, option 00 should be used.
(i.e. 16uS)
The measurement is taken between mid parity and mid sync
- measured at PDIN/NDIN terminals.
TF
Output
TERMINAL FLAG - This line is available only on the 64-pin
MA3690 and on the MA3693 (where it replaces RT1). The
line indicates the state of the Terminal Flag bit in the Status
Word, and can be inhibited by the mode code Inhibit
Terminal Flag. This is an active LOW signal.
TEST/SOT
Inputs
These lines are for test purposes only and for normal chip set
operation must both be tied low.
3/41
MA3690/1/3
OPERATION IN BUS CONTROL MODE
For this mode of operation the RT/BC pin must be held in
the logic zero state. On power up the PUC or RESET line must
be pulsed low for a minimum of 500ns causing the chip set to
initialise and assume the halted state with the HALTED output
low. To release the terminal from the halted state, the
subsystem must drive the HALTREQ line through a low to high
transition, at which time the HALTED line will go inactive.
When the HALTED line goes inactive,the terminal will
address a four word deep Instruction Store as shown below,
using the C0 and Cl outputs.
This first instruction after a Reset is a NOOP.
INSTRUCTION STORE
C1
0
0
1
1
C0
0
1
0
1
Word
Passive Monitor - Code 10
Instruction
Receive Command
Transmit Command
Data Pointer
If the Function code of the Instruction word is 10 the
terminal will disable the transmitter output stages, suspend
table execution and merely monitor the specified bus for valid
words.
No Operation - Code 11
The No Operation code provides a means of introducing
delay or a wait sequence into the table operation. In selecting
this code the terminal will be forced into the Report sequence
and provide either an increment signal (INCADRN) or an
interrupt (IRQN) if the Interrupt Always flag in the Instruction
word has been selected.
Bus Select
Code
00
01
Definition
Transmit on bus 0
Transmit on bus 1
The Function Code (bits 4 and 3 of the Instruction Word)
specifies the required terminal mode of operation.
Execute - Code 00
With the Function code bits set to 00, the terminal will
execute the message as defined in the Message code bits
Self Test - Code 01
If the terminal has been selected to perform a Self Test
then the terminal transmitter output stages will be disabled and
the self test sequence entered. At the end of the Self Test the
transmitter stages will be re-enabled and a Report sequence
will be activated, in order to report on the success, or failure, of
the Self Test.
The instruction word specifies the operation which the
terminal is to carry out, and is formatted in the following way:
Instruction Word
Bit
15.14. 13.12.11.
10.9.8.7.
6.5.
4.3.
2.1.0.
Retry Retry
Interrupt Bus
Functlon Message
Count Condition Conditlon Select Code
Code
The significance of the instruction word bits are as follows:
Message Code
Code
000
001
010
011
100
101
110
111
Transfer Type
RT to BC
BC to RT
RT to RT, data to BC subsystem
RT to RT, no data to BC subsystem
Broadcast RT to BC, non data mode commands only
Broadcast BC to RT
Broadcast RT to RT, data to BC subsystem
Broadcast RT to RT, no data to BC subsystem
Note: Bit 6 of the instruction word is tied low internally.
The required data bus on which transactions take place is
defined by bit 5. In addition to this, this bit defines the bus on
which the Transmitter Self Test operation will be conducted
and the choice of the bus for monitor purposes in Passive
Monitor mode.
Interrupt Condition
Code
0001
0010
0100
1000
Definition
Interrupt if no response
Interrupt if status bit set
Interrupt always
Interrupt if word error
Mode Codes without data are followed by a NOOP.
Function Code
Code
00
01
10
11
Terminal Function
Execute message code
Perform self test
Monitor bus
No operation (NOOP)
If the terminal detects one of the above conditions and the
appropriate flag is set, the the IRQ line will pulse low for 250ns.
4/41
MA3690/1/3
Four bits of the Instruction word (bits 10-7) define
conditions under which the terminal will generate an interrupt
to the subsystem (IRQN). Note that the generation of IRQN will
only take place after any selected retry conditions have been
exhausted.
The interrupt conditions which may be selected can be
categorised as follows:
1. Interrupt if no response - the terminal will generate an
interrupt if the RT does not respond.
2. Interrupt if Status bit set - the terminal will generate an
interrupt if a received status word has a bit set other
than in the RT address field or if the wrong RT
responds.
3. Interrupt Always - the terminal will generate an
interrupt regardless of whether the message was
successful or not.
4. Interrupt if word error - the terminal will generate an
interrupt if a word encoding or word count error
occurs.
In all of the above cases, the terminal will generate a 250ns
pulse on IRQN and enter the halted state. This will occur after
the Report sequence has been executed.
Note the INCADRN will not be produced.
Retry Condition
Code
001
010
100
Definition
Retry if error
Retry if status bit set
Retry if busy set
Note: This word should be set to 1111 HEX if the message
code is 001 or 101, or if the Function Code is not 00.
Retry Count
The two most significant bits of the instruction word specify
the number of retries to be carried out when a retry condition
has been detected. (Maximun 3 given by code 11)
RECEIVE COMMAND WORD
The receive command word is addressed when CODENN
and C1 are both low and R/WN and C0 are both high. This
word is the command word which will be transmitted for a BC
to RT transfer or as the first command word of an RT to RT
transfer.
Note: This word should be set to 1111 HEX if the message
code is 000 or 100, or if the Function Code is not 00.
TRANSMIT COMMAND WORD
The transmit command word is addressed when CODENN
and C0 are both low and R/WN and C1 are both high. This
word is the command word which will be transmitted for an RT
to BC transfer or as the second command word of an RT to RT
transfer.
DATA POINTER WORD
The data pointer word is addressed when CODENN is low
and C0, C1 and R/WN are all high. This word is intended as a
base address pointer to the subsystem data store thus
specifying where any data words associated with the current
instruction should be stored or retrieved from. As such, this
word is not read into the terminal itself but is merely transferred
from the Instruction Store to a suitable external address latch.
(The BUFENN signal is therefore inactive during this transfer).
Three bits of the Instruction word (bits 13-11) are used as
flags to specify conditions under which the terminal will
execute automatic message retries until the retry number
count is zero. The retry flags are involved with the following
conditions:
1. Retry if error - this includes a no-status response, a
word encoding error, or a wrong word count from a
responding RT.
2. Retry if Status bit set - an automatic retry will take
place if a received status word has a bit set, other
than in the RT address field, or if the wrong RT
responds.
3. Retry if Busy - this is a specific check for the setting of
the Busy bit in a responding RT’s status word.
The remaining two bits of the Instruction word specify the
number of message retries which the Bus Controller will
attempt automatically. A code of 00 specifies no retries, a code
of 11 specifies the maximum of three retries. The retries are in
addition to the initial message transmitted, hence a message
may be transmitted four times in total, if not successful. Note
that if the condition which is being tested becomes invalid, the
retry sequence will discontinue on the next message with the
Bus Controller completing execution of the message in the
relevant manner.
5/41
stm32/stm8
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