CES2309
P-Channel Enhancement Mode Field Effect Transistor
FEATURES
-20V, -2.2A, R
DS(ON)
= 165mΩ @V
GS
= -4.5V.
R
DS(ON)
= 300mΩ @V
GS
= -2.5V.
High dense cell design for extremely low R
DS(ON)
.
Rugged and reliable.
Lead free product is acquired.
SOT-23 package.
D
PRELIMINARY
G
D
G
SOT-23
S
S
ABSOLUTE MAXIMUM RATINGS
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed
a
T
A
= 25 C unless otherwise noted
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
J
,T
stg
Limit
-20
Units
V
V
A
A
W
C
±
12
-2.2
-8
1.25
-55 to 150
Maximum Power Dissipation
Operating and Store Temperature Range
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Ambient
b
Symbol
R
θJA
Limit
100
Units
C/W
This is preliminary information on a new product in development now .
Details are subject to change without notice .
7-6
Rev 1. 2006.April
http://www.cetsemi.com
CES2309
Electrical Characteristics
Parameter
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics
Static Drain-Source
On-Resistance
Dynamic Characteristics
d
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Drain-Source Diode Forward Current
b
Drain-Source Diode Forward Voltage
c
d
c
T
A
= 25 C unless otherwise noted
Symbol
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(on)
Test Condition
V
GS
= 0V, I
D
= -250µA
V
DS
= -20V, V
GS
= 0V
V
GS
= 12V, V
DS
= 0V
V
GS
= -12V, V
DS
= 0V
V
GS
= V
DS
, I
D
= -250µA
V
GS
= -4.5V, I
D
= -2.2A
V
GS
= -2.5V, I
D
= -2.0A
V
DS
= -5V, I
D
= -2.2A
V
DS
= -6V, V
GS
= 0V,
f = 1.0 MHz
-0.5
135
230
3
275
105
70
10
V
DD
= -6V, I
D
= -1A,
V
GS
= -4.5V, R
GEN
= 6Ω
4
19
5
V
DS
= -6V, I
D
= -2.2A,
V
GS
= -4.5V
6.2
0.5
0.8
-2.2
V
GS
= 0V, I
S
= -2.2A
-1.2
20
10
40
10
10
Min
-20
-1
100
-100
-1.5
165
300
Typ
Max
Units
V
µA
nA
nA
V
mΩ
mΩ
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
A
V
Gate Threshold Voltage
7
g
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
Drain-Source Diode Characteristics and Maximun Ratings
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 5 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
7-7
CES2309
5
-V
GS
=4.5,4,3,V
5
-I
D
, Drain Current (A)
4
-V
GS
=2.5V
3
-I
D
, Drain Current (A)
4
3
2
-V
GS
=2.0V
2
T
J
=125 C
1
25 C
0
-55 C
1
-V
GS
=1.5V
0
0
1
2
3
4
5
0
0.5
1.0
1.5
2.0
2.5
3.0
-V
DS
, Drain-to-Source Voltage (V)
Figure 1. Output Characteristics
360
300
240
180
120
60
0
0
2
4
6
8
10
Coss
Crss
Ciss
2.2
1.9
1.6
1.3
1.0
0.7
0.4
-100
-V
GS
, Gate-to-Source Voltage (V)
Figure 2. Transfer Characteristics
R
DS(ON),
Normalized
R
DS(ON)
, On-Resistance(Ohms)
I
D
=-2.2A
V
GS
=-4.5V
C, Capacitance (pF)
-50
0
50
100
150
200
-V
DS
, Drain-to-Source Voltage (V)
Figure 3. Capacitance
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-50
T
J
, Junction Temperature( C)
Figure 4. On-Resistance Variation
with Temperature
-I
S
, Source-drain current (A)
V
GS
=0V
1
V
TH
, Normalized
Gate-Source Threshold Voltage
V
DS
=V
GS
I
D
=-250µA
10
10
0
10
-25
0
25
50
75
100
125
150
-1
0.4
0.6
0.8
1.0
1.2
1.4
T
J
, Junction Temperature( C)
Figure 5. Gate Threshold Variation
with Temperature
-V
SD
, Body Diode Forward Voltage (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current
7-8
CES2309
-V
GS
, Gate to Source Voltage (V)
5 V =-6V
DS
I
D
=-2.2A
4
10
2
R
DS(ON)
Limit
-I
D
, Drain Current (A)
10
1
3
10
0
2
1ms
10ms
100ms
1s
DC
10
-1
1
0
0
1.6
3.2
4.8
6.4
10
-2
T
A
=25 C
T
J
=150 C
Single Pulse
-1
10
10
0
10
1
10
2
7
Qg, Total Gate Charge (nC)
Figure 7. Gate Charge
-V
DS
, Drain-Source Voltage (V)
Figure 8. Maximum Safe
Operating Area
V
DD
t
on
V
IN
D
V
GS
R
GEN
G
90%
t
off
t
r
90%
R
L
V
OUT
t
d(on)
V
OUT
t
d(off)
90%
10%
t
f
10%
INVERTED
S
V
IN
50%
10%
50%
PULSE WIDTH
Figure 9. Switching Test Circuit
Figure 10. Switching Waveforms
10
0
r(t),Normalized Effective
Transient Thermal Impedance
D=0.5
0.2
10
-1
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
1. R
θJA
(t)=r (t) * R
θJA
2. R
θJA
=See Datasheet
3. T
JM-
T
A
= P* R
θJA
(t)
4. Duty Cycle, D=t1/t2
10
-2
Single Pulse
-3
10
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
7-9
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