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MTB12P04J3

产品描述P-channel logic level enhancement mode power mosfet
文件大小293KB,共7页
制造商Cystech
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MTB12P04J3概述

P-channel logic level enhancement mode power mosfet

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CYStech Electronics Corp.
P-Channel Logic Level Enhancement Mode Power MOSFET
Spec. No. : C734J3
Issued Date : 2009.07.09
Revised Date :
Page No. : 1/7
MTB12P04J3
Features
Low Gate Charge
Simple Drive Requirement
Pb-free lead plating & Halogen-free package
BV
DSS
I
D
R
DSON(MAX)
-40V
-25A
12.6mΩ
Equivalent Circuit
MTB12P04J3
Outline
TO-252
G:Gate D:Drain
S:Source
G D S
Absolute Maximum Ratings
(T
C
=25°C, unless otherwise noted)
Parameter
Symbol
Limits
Unit
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ T
C
=25°C
Continuous Drain Current @ T
C
=100°C
Pulsed Drain Current
*1
Avalanche Current
Avalanche Energy @ L=0.1mH, I
D
=-25A, R
G
=25Ω
Repetitive Avalanche Energy @ L=0.05mH
*2
Total Power Dissipation @T
C
=25℃
Total Power Dissipation @T
C
=100℃
Operating Junction and Storage Temperature Range
Note : *1
.
Pulse width limited by maximum junction temperature
*2. Duty cycle
1%
MTB12P04J3
V
DS
V
GS
I
D
I
D
I
DM
I
AS
E
AS
E
AR
Pd
Tj, Tstg
-40
±20
-25
-18
-100
-25
31.25
15
50
17
-55~+175
V
A
mJ
W
°C
CYStek Product Specification

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描述 P-channel logic level enhancement mode power mosfet

 
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