74VHCT240A Octal Buffer/Line Driver with 3-STATE Outputs
March 1997
Revised April 2005
74VHCT240A
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHCT240A is an advanced high speed CMOS octal
bus transceiver fabricated with silicon gate CMOS technol-
ogy. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. The VHCT240A is an inverting 3-STATE
buffer having two active-LOW output enables. This device
is designed to be used as 3-STATE memory address driv-
ers, clock drivers, and bus oriented transmitter/receivers.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. These circuits prevent device destruction
due to mismatched supply and input/output voltages. This
device can be used to interface 5V to 3V systems and two
supply systems such as battery back up.
Note 1:
Outputs in OFF-State
Features
s
High Speed:
t
PD
5.6 ns (typ) at V
CC
5V
s
Power down protection is provided on inputs and
outputs
s
Low power dissipation: I
CC
4
P
A (max) @ T
A
25
q
C
s
Pin and function compatible with 74HCT240
Ordering Code:
Order Number
74VHCT240AM
74VHCT240ASJ
74VHCT240AMTC
74VHCT240AN
Package Number
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
OE
1
, OE
2
I
0
–I
7
O
0
–O
7
Description
3-STATE Output Enable
Inputs
Outputs 3-STATE Outputs
© 2005 Fairchild Semiconductor Corporation
DS500002
www.fairchildsemi.com
74VHCT240A
Absolute Maximum Ratings
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
(Note 3)
(Note 4)
Input Diode Current (I
IK
)
Output Diode Current (I
OK
) (Note 5)
DC Output Current (I
OUT
)
DC V
CC
/GND Current (I
CC
)
Storage Temperature (T
STG
)
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
q
C
0.5V to
7.0V
0.5V to
7.0V
0.5V to V
CC
0.5V
0.5V to
7.0V
20 mA
r
20 mA
r
25 mA
r
75 mA
65
q
C to
150
q
C
Recommended Operating
Conditions
(Note 6)
Supply Voltage (V
CC
)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
(Note 3)
(Note 4)
Operating Temperature (T
OPR
)
Input Rise and Fall Time (t
r
, t
f
)
V
CC
5.0V
r
0.5V
0 ns/V
a
20 ns/V
Note 2:
Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside databook specifica-
tions.
Note 3:
HIGH or LOW state. I
OUT
absolute maximum rating must be
observed.
Note 4:
When outputs are in OFF-State or when V
CC
Note 5:
V
OUT
GND, V
OUT
!
V
CC
(Outputs Active).
Note 6:
Unused inputs must be held HIGH or LOW. They may not float.
OV.
4.5V to
5.5V
0V to
5.5V
0V to V
CC
0V to
5.5V
40
q
C to
85
q
C
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
V
OL
I
OZ
I
IN
I
CC
I
CCT
I
OFF
Parameter
HIGH Level
Input Voltage
LOW Level
Input Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
3-STATE Output
Off-State Current
Input Leakage
Current
Quiescent Supply
Current
Maximum I
CC
/Input
Output Leakage Current
(Power Down State)
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
4.5
5.5
0–5.5
5.5
5.5
0.0
4.40
3.94
0.0
0.1
0.36
4.50
T
A
Min
2.0
2.0
0.8
0.8
4.40
3.80
0.1
0.44
25
q
C
Typ
Max
T
A
40
q
C to
85
q
C
Max
2.0
2.0
0.8
0.8
Min
Units
V
V
V
V
V
V
V
IN
Conditions
V
IH
I
OH
50
P
A
or V
IL
I
OH
8 mA
V
IN
V
IH
I
OL
50
P
A
or V
IL
I
OL
8 mA
V
IN
V
IH
or V
IL
V
OUT
V
CC
or GND
V
IN
V
IN
V
IN
V
OUT
5.5V or GND
V
CC
or GND
3.4V
V
CC
or GND
5.5V
r
0.25
r
0.1
4.0
1.35
0.5
r
2.5
r
1.0
40.0
1.50
5.0
P
A
P
A
P
A
mA
Other Input
P
A
Noise Characteristics
Symbol
V
OLP
(Note 7)
V
OLV
(Note 7)
V
IHD
(Note 7)
V
ILD
(Note 7)
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
V
CC
(V)
5.0
5.0
5.0
5.0
T
A
Typ
0.9
25
q
C
Limits
1.1
Units
V
V
V
V
C
L
C
L
C
L
C
L
Conditions
50 pF
50 pF
50 pF
50 pF
0.9
1.1
2.0
0.8
Note 7:
Parameter guaranteed by design.
3
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74VHCT240A
AC Electrical Characteristics
Symbol
t
PLH
t
PHL
t
PZL
t
PZH
t
PLZ
t
PHZ
t
OSLH
t
OSHL
C
IN
C
OUT
C
PD
Parameter
Propagation Delay
Time
3-STATE Output
Enable Time
3-STATE Output
Disable Time
Output to
Output Skew
Input
Capacitance
Output
Capacitance
Power Dissipation
Capacitance
Note 8:
Parameter guaranteed by design. t
OSLH
|t
PLH max
t
PLH min
|; t
OSHL
|t
PHL max
t
PHL min
|
Note 9:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: I
CC
(opr.) C
PD
* V
CC
* f
IN
I
CC
/8 (per F/F). The total C
PD
when n pcs. of the Octal D Flip-Flop operates
can be calculated by the equation: C
PD
(total) 20
12n.
V
CC
(V)
5.0
r
0.5
5.0
r
0.5
5.0
r
0.5
5.0
r
0.5
T
A
Min
25
q
C
Typ
5.6
6.1
6.5
7.3
7.0
Max
7.8
8.8
10.4
11.4
11.4
1.0
4
9
19
10
T
A
40
q
C to
85
q
C
Max
9.0
10.0
12.5
13.5
13.0
1.0
10
1.0
1.0
1.0
1.0
1.0
Min
Units
ns
ns
ns
ns
pF
pF
pF
R
L
R
L
Conditions
C
L
C
L
1 k
:
1 k
:
C
L
C
L
C
L
15 pF
50 pF
15 pF
50 pF
50 pF
(Note 8)
V
CC
V
CC
Open
5.0V
(Note 9)
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