375D–03, STYLE
Package 20275
1
120 Watts, 21 10-2170 MHz
PUSH/PULL LATERAL MOSFET
Description
The PTF102003 is a 120–watt, internally matched LDMOS
FET in-
tended for WCDMA applications from 2110 to 2170 MHz. This device typi-
cally operates at 48% efficiency (P-1dB) and 14 dB linear gain. Full gold
metallization ensures excellent device lifetime and reliability.
PTF102003
Key Features
•
•
INTERNALLY MATCHED
Typical WCDMA Performance at 28 V
- Average Output Power = 20 W atts
- Gain = 14 dB
- Efficiency = 22%
(channel bandwidth 3.84 MHz,
adjacent channels ±5 MHz,
peak/avg 8.5:1 at 0.01% CCD)
Typi cal Singl e Carrier WCDMA Perfor mance
-35
-40
Efficiency
Gain
25
20
15
10
ACPR
V
DD
= 28 V
I
DQ
= 1.45 A
f = 2170 MHz
15
20
25
5
0
-45
-50
-55
-60
0
Gain (dB) & Efficiency (%)
ACPR (dBc )x
• Typical CW Performance at 28 V
- Output Power at P1-dB = 120 W atts
- Gain = 13 dB
- Efficiency = 48%
• Full Gold Metallization
• Integrated ESD Protection; Class 1
(minimum) Human Body Model
• Excellent Thermal Stability
• Broadband Internal Matching
• Low HCI Drift
• Capable of Handling 10:1 VSWR @ 28 V ,
120 Watts (CW) Output Power
5
10
Output Pow er (Watts )
Guaranteed Performance
WCDMA Measurements
(in test fixture)
V
DD
= 28 V, I
DQ
= 1.45 A, P
OUT
= 20 W AVG
f = 2170 MHz, Single Carrier 3GPP Channel Bandwidth 3.84 MHz, Adj Channels ± 5 MHz, Peak to Avg 8.5:1
Characteristic
Adjacent Channel Power Ratio
Gain
Drain Efficiency
Symbol
ACPR
G
ps
D
Min
—
13
19
Typ
-45
14.5
22
Max
-40
—
—
Units
dB
dB
%
Two-Tone Measurements
(in test fixture)
V
DD
= 28 V, I
DQ
= 1.20 A, P
OUT
= 120 W PEP, f = 2170 MHz, Tone Spacing = 100 kHz
Characteristic
Gain
Drain Efficiency
Intermodulation Distortion
All published data at T
CASE
= 25°C unless otherwise indicated.
Symbol
G
ps
D
Min
12.5
31
-27
Typ
14
36
-30
Max
—
—
—
Units
dB
%
dBc
IMD
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PTF 102003
Electrical Characteristics
Characteristic
Drain-Source Breakdown Voltage
Drain Leakage Current
On-State Resistance
Quiescent Current Gate Voltage
Gate Leakage Current
(Guaranteed)
Conditions
V
GS
= 0 V, I
DS
= 1 µA/Side
V
DS
= 28 V, V
GS
= 0 V/Side
V
GS
= 10 V, I
DS
= 1 A/Side
V
DS
= 28 V, I
D
= 700 mA/Side
V
GS
= 10 V, V
DS
= 0 V/Side
Symbol
V
(BR)DSS
I
DSS
R
DS(on)
V
GS(Q)
I
GSS
Min
65
—
—
2.5
—
Typ
—
—
0.13
3.4
—
Max
—
1.0
—
4
100
Units
Volts
µA
Ohms
Volts
nA
Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Operating Junction Temperature
Total Device Dissipation
Above 25°C derate by
Storage Temperature Range
Thermal Resistance (T
CASE
= 70°C)
T
STG
R
JC
Symbol
V
DSS
V
GS
T
J
P
D
Value
65
+15, -0.5
200
330
1.88
–40 to +150
0.55
Unit
Volts
Volts
°C
Watts
W/°C
°C
°C/W
Typical Performance
Broa dba nd Li ne arity Perfor mance
40
0
Efficiency
IRL
Gain
V
DD
= 28 V, I
DQ
= 1.2 A
P
OUT
= 120 W PEP
2120
2140
2160
IM3
-5
-10
-40
IMD vs. Output Pow er (PEP)
-30
V
DD
= 28 V, f = 2170 MHz
-Tone Spacing = 100 kHz
I
DQ
= 1.6 A
-50
I
DQ
= 1.4 A
I
DQ
= 1.2 A
-60
I
DQ
= 1.0 A
Gain (dB) & Efficiency (%)
35
30
25
20
15
10
5
-20
-25
-30
-35
-40
2200
0
2100
IMD (dBc )
x
IRL & IMD
-15
2180
-70
1
10
100
1000
Freque nc y (MHz)
Output Pow er (Watts PEP)
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PTF 102003
Typical Performance
(cont.)
IMD vs. Output Pow er Efficiency
-20
-30
V
DD
= 28 V
I
DQ
= 1.2 A
Efficiency
IM3
40
32
24
16
8
0
140
Pow er Gain vs. Output Pow er
15
IMD dBc
-40
-50
-60
-70
0
20
40
60
80
100
Power Gain (dB)
14
13
12
11
10
1
10
100
1000
I
DQ
= 1.2 A
I
DQ
= 1.0 A
V
DD
= 28 V
I
DQ
= 1.6 A
I
DQ
= 1.4 A
IM5
IM7
120
Output Pow er (Watts -PEP)
Output Pow er (Watts CW)
Gate-Source Voltage vs. Case Temperature
1.03
1.02
Voltage normalized to 1.0 V
Series show current (A)
Capa citance vs. Suppl y Voltage (per side ) *
180
160
30
C
gs
V
GS
= 0 V
f = 1 MHz
C
ds
C
dg
0
10
20
30
40
25
Bias Voltage (V)
Cds & Cgs (pF)x
1.01
1.00
0.99
0.98
0.97
0.96
0.95
-20
30
80
0.80
3.07
5.33
7.60
9.87
12.13
130
140
120
100
80
60
40
20
0
15
10
5
0
Case Temperature (°C)
Supply Voltage (Volt s)
* This part is internally matched. Measurements of the fin-
ished product will not yield these results.
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Cdg (pF)
x
20
PTF 102003
Broadband Circuit Impedance
V
DD
= 28 V, I
DQ
= 1.2 A, Pout = 20 W Avg 2 Tone 1 MHz Spacing
Z
0
= 50
Z Source
G
G
D
S
Z Load
D
Frequency
MHz
2100
2110
2140
2170
2200
Z Source
R
5.2
5.0
4.9
4.8
4.7
jX
-6.58
-6.62
-6.73
-6.85
-7.10
Z Load
R
2.52
2.48
2.56
2.62
2.72
jX
-7.6
-6.8
-6.2
-5.78
-5.17
Test Circuit
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PTF 102003
Test Circuit
(cont.)
Test Circuit Schematic for 2170 MHz
DUT
1, 21
2
3
4, 14
5, 7
6, 8
9, 15
10, 16
11, 17
12, 18
13
19
20
PTF 102003
0.02 @ 2170 MHz
0.07 @ 2170 MHz
0.26 @ 2170 MHz
0.50 @ 2170 MHz
0.03 @ 2170 MHz
0.08 @ 2170 MHz
0.04 @ 2170 MHz
0.06 @ 2170 MHz
0.26 @ 2170 MHz
0.02 @ 2170 MHz
0.42 @ 2170 MHz
0.27 @ 2170 MHz
0.05 @ 2170 MHz
LDMOS Transistor
Microstrip 29.20
Microstrip 50
Microstrip 20.10
Microstrip 15.50
Microstrip 13.10
Microstrip 6.80
Microstrip 5.50
Microstrip 13.10
Microstrip 53.60
Microstrip 10.40
Microstrip 53.60
Microstrip 20.10
Microstrip 50
C1, C5, C8, C13
C2,
C3,
C7,
C9,
C6
C4
C12
C14
Capacitor, 10 µF, 35 V, Tant TE Series
SMD, Digi-Key PCS6106TR
Capacitor, 6.8 pF, 100A 6R8
Capacitor, 1.6 pF, ATC 600B 1R6 BW
Capacitor, 5.6 pF, 100B 5R6
Capacitor, 0.1 µF, 50 V,
Digi-Key PCC103BCT
Capacitor, 3.3 pF, ATC 600B 3R3 BW
Connector, SMA Female, Panel Mount
Resistor, 3.3 K ohms, 1/16W 5% 0603
Digi-Key P3.3K GCT
Resistor, 1 K ohms, 1/16W 5% 0603
Digi-Key P1.0K GCT
4003, .020", 1 oz. copper both sides,
1 layer. AlliedSignal
C10, C11
J1, J2
R1, R4
R2, R3
PCB
Assembly Diagram (not to scale)
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