LQ
32, 48, 64 K
EY
QMatrix
™
K
EYPANEL
S
ENSOR
IC
S
LED
DRDY
X7
CZ1
CSR
AIN
MS
Vdd
Vss
YG
SS
QT60325B, QT60485B, QT60645B
Advanced second generation QMatrix controllers
Up to 32, 48 or 64 touch keys through any dielectric
Panel thicknesses to 5 cm or more
100% autocal for life - no adjustments required
Keys individually adjustable for sensitivity, response time,
and many other critical parameters
Mix and match key sizes & shapes in one panel
Passive matrix - no components at the keys
Moisture suppression capable
AKS™ - Adjacent Key Suppression feature
Synchronous noise suppression
Sleep mode with wake pin
SPI Slave or Master/Slave interface to a host controller
Low overhead communications protocol
44-pin TQFP package
MOSI
MISO
SCLK
RST
Vdd
Vss
XTO
XTI
X0
X1
X2WS
1
2
3
4
5
6
7
44 43 42 41 40 39 38 37 36 35 34
33
32
CZ2
YS0
YS1
YS2
Aref
AGnd
AVdd
YC7
YC6
YC5
YC4
QT60325B
QT60485B
QT60645B
TQFP-44
31
30
29
28
27
26
25
24
8
9
10
11
23
12 13 14 15 16 17 18 19 20 21 22
XS
X6
X5
X4
X3
Vdd
YC1
YC0
Vss
YC3
YC2
APPLICATIONS
Security keypanels
Industrial keyboards
Appliance controls
Outdoor keypads
ATM machines
Touch-screens
Automotive panels
Machine tools
The QT60325B, QT60485B, and QT60645B digital charge-transfer (“QT”) QMatrix™ ICs are designed to detect human touch on
up to 32, 48, or 64 keys respectively using a scanned, passive X-Y matrix. It will project the keys through almost any dielectric, e.g.
glass, plastic, stone, ceramic, and even wood, up to thicknesses of 5 cm or more. The touch areas are defined as simple 2-part
interdigitated electrodes of conductive material, like copper or screened silver or carbon deposited on the rear of a control panel.
Key sizes, shapes and placement are almost entirely arbitrary; sizes and shapes of keys can be mixed within a single panel of
keys and can vary by a factor of 20:1 in surface area. The sensitivity of each key can be set individually via simple functions over
the SPI port, for example via Quantum’s QmBtn program. Key setups are stored in an onboard eeprom and do not need to be
reloaded with each power-up.
These ICs are designed specifically for appliances, electronic kiosks, security panels, portable instruments, machine tools, or
similar products that are subject to environmental influences or even vandalism. They permit the construction of 100% sealed,
watertight control panels that are immune to humidity, temperature, dirt accumulation, or the physical deterioration of the panel
surface from abrasion, chemicals, or abuse. To this end the devices contain Quantum-pioneered adaptive self-calibration, drift
compensation, and digital filtering algorithms that make the sensing function robust and survivable. The devices use short dwell
times and Quantum’s patent-pending AKS™ feature to permit operation in wet environments.
The parts use a passive key matrix, dramatically reducing cost over older technologies that require an ASIC for every key. The
key-matrix can be made of standard flex material (e.g. Silver on PET plastic) or ordinary PCB material to save cost.
External circuitry consists of an opamp, R2R ladder-DAC network, a common PLD, a FET switch, and a small number of resistors
and capacitors which can fit into a footprint of roughly 8 sq. cm (1.5 sq. in). Control and data transfer is via a SPI port which can
be configured in either a Slave or Master/Slave mode.
QT60xx5B ICs make use of an important new variant of charge-transfer sensing,
transverse charge-transfer,
in a matrix format
that minimizes the number of required scan lines to provide a high economy of scale.
The B version is identical to the earlier QT60xx5 parts in all respects except that the device exhibits lower signal noise.
QT60xx5B replaces QT60xx5 parts with no circuit changes. After 2003, QT60xx5 devices will no longer be available.
AVAILABLE OPTIONS
T
A
0
-40 C to +105
0
C
-40
0
C to +105
0
C
-40
0
C to +105
0
C
TQFP
QT60325B-AS
QT60485B-AS
QT60645B-AS
lQ
Copyright © 2001 Quantum Research Group Ltd
Pat Pend. R1.06/0403
© Quantum Research Group Ltd.
Contents
1 Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
1.1 Field Flows
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
1.2 Circuit Model
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
1.3 Matrix Configuration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
1.4 Communications
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
2 Signal Processing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
2.1 Negative Threshold
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
2.2 Positive Threshold
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
2.3 Hysteresis
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
2.4 Drift Compensation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
2.5 Detection Recalibration Delay
. . . . . . . . . . . . . . . . . . . . . . . . . . .
6
2.6 Detect Integrator (‘DI’)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
2.7 Positive Recalibration Delay
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
2.8 Reference Guardbanding
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
2.9 Adjacent Key Suppression (AKS™)
. . . . . . . . . . . . . . . . . . . . . . .
8
2.10 Full Recalibration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
2.11 Boundary Error Reporting
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
2.12 Device Status & Reporting
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
3 Circuit Operation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
3.1 Part Differences
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
3.2 Matrix Scan Sequence
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
3.3 Signal Path
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
3.4 'X' Electrode Drives
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
3.4.1 RFI From X Lines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
3.4.2 Noise Coupling Into X lines
. . . . . . . . . . . . . . . . . . . . . . . . . .
12
3.5 'Y' Gate Drives
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
3.5.1 RFI From Y Lines
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
3.5.2 Noise Coupling Into Y Lines
. . . . . . . . . . . . . . . . . . . . . . . . . .
12
3.6 Burst Length & Sensitivity
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
3.7 Intra-Burst Spacing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
3.8 Burst Spacing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
3.9 PLD Circuit and Charge Sampler
. . . . . . . . . . . . . . . . . . . . . . .
13
3.10 Opamps
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
3.11 Sample Capacitors
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
3.12 R2R Resistor Ladder
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
3.13 Water Film Suppression
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
3.14 Reset Input
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
3.15 Oscillator
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
3.16 Startup / Calibration Times
. . . . . . . . . . . . . . . . . . . . . . . . . .
14
3.17 Sleep_Wake / Noise Sync
. . . . . . . . . . . . . . . . . . . . . . . . . . .
14
3.18 LED / Alert Output
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
3.19 CSR Drive Polarity
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
3.20 Oscilloscope Sync
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
3.21 Power Supply and PCB Layout
. . . . . . . . . . . . . . . . . . . . . . . .
15
3.22 ESD / Noise Considerations
. . . . . . . . . . . . . . . . . . . . . . . . . .
16
4 Serial Interface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
4.1 Serial Port specifications
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
4.2 Protocol Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
4.3 SPI Slave-Only Mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
4.4 SPI Master-Slave Mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
4.5 Sensor Echo and Data Response
. . . . . . . . . . . . . . . . . . . . . . .
19
4.6 Eeprom Corruption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
5 Commands & Functions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
5.1 Direction Commands
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
g 0x67 - Get Command
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
p 0x70 - Put Command
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
5.2 Scope Commands
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
s 0x73 - Specific Key Scope
. . . . . . . . . . . . . . . . . . . . . . . . . . .
21
S 0x53 - All Keys Scope
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
x 0x78 - Row Keys Scope
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
y 0x79 - Column Keys Scope
. . . . . . . . . . . . . . . . . . . . . . . . . . .
21
5.3 Status Commands
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21
0 0x30 - Signal for Single Key
. . . . . . . . . . . . . . . . . . . . . . . . . .
21
1 0x31 - Delta Signal for Single Key
. . . . . . . . . . . . . . . . . . . . . . .
21
.............................
................................
4 0x34 - Cz State
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 0x35 - Detection Integrator Counts
. . . . . . . . . . . . . . . . . . . . . .
6 0x36 - Eeprom Checksum
. . . . . . . . . . . . . . . . . . . . . . . . . . .
7 0x37 - General Device Status
. . . . . . . . . . . . . . . . . . . . . . . . .
<sp> 0x20 - Signal Levels for Group
. . . . . . . . . . . . . . . . . . . . . . .
! 0x21 - Delta Signals for Group
. . . . . . . . . . . . . . . . . . . . . . . . .
" 0x22 - Reference Levels for Group
. . . . . . . . . . . . . . . . . . . . . .
# 0x23 - R2R Offset for Group
. . . . . . . . . . . . . . . . . . . . . . . . . .
$ 0x24 - Charge Cancellation for Group
. . . . . . . . . . . . . . . . . . . .
% 0x25 - Detect Integrator Counts for Group
. . . . . . . . . . . . . . . . .
e 0x65 - Error Code for Selected Key
.....................
k 0x6B - Reporting of First Touched Key
. . . . . . . . . . . . . . . . . . . .
K 0x4B - Key Touch Reporting for Group
. . . . . . . . . . . . . . . . . . .
5.4 Setup Commands
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
^A 0x01 - Negative Detect Threshold
. . . . . . . . . . . . . . . . . . . . . . .
^B 0x02 - Positive Detect Threshold
. . . . . . . . . . . . . . . . . . . . . . .
^C 0x03 - Negative Threshold Hysteresis
. . . . . . . . . . . . . . . . . . . .
^D 0x04 - Positive Threshold Hysteresis
. . . . . . . . . . . . . . . . . . . . .
^E 0x05 - Dwell Time in Machine Cycles
. . . . . . . . . . . . . . . . . . . . .
^G 0x07 - Burst Spacing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
^H 0x08 - Negative Drift Compensation Rate
. . . . . . . . . . . . . . . . . .
^I 0x09 - Positive Drift Compensation Rate
. . . . . . . . . . . . . . . . . . .
^J 0x0A - Detect Integrator Limit
. . . . . . . . . . . . . . . . . . . . . . . . .
^K 0x0B - Positive Recalibration Delay
.....................
^L 0x0C - Negative Recalibration Delay
. . . . . . . . . . . . . . . . . . . . .
^M 0x0D - Intra-Burst Pulse Spacing
. . . . . . . . . . . . . . . . . . . . . . .
^N 0x0E - Positive Reference Error Band
. . . . . . . . . . . . . . . . . . . .
^O 0x0F - Negative Reference Error Band
. . . . . . . . . . . . . . . . . . .
^P 0x10 - Adjacent Key Suppression (‘AKS’)
. . . . . . . . . . . . . . . . . .
5.5 Supervisory / System Functions
. . . . . . . . . . . . . . . . . . . . . . . .
6 0x36 - Eeprom Checksum
. . . . . . . . . . . . . . . . . . . . . . . . . . .
D 0x44 - DAC Test
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
L 0x4C - Lock Reference Levels
. . . . . . . . . . . . . . . . . . . . . . . . .
b 0x62 - Recalibrate Keys
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
l 0x6C - Return Last Command Character
. . . . . . . . . . . . . . . . . . .
r 0x72 - Reset Device
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V 0x56 - Return Part Version
. . . . . . . . . . . . . . . . . . . . . . . . . . .
W 0x57 - Return Part Signature
. . . . . . . . . . . . . . . . . . . . . . . . .
Z 0x5A - Enter Sleep
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
^Q 0x11 - Data Rate Selection
. . . . . . . . . . . . . . . . . . . . . . . . . .
^R 0x12 - Oscilloscope Sync
. . . . . . . . . . . . . . . . . . . . . . . . . . .
^S 0x13 - Cs Clamp Polarity
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
^T 0x14 - Boundary Eqn Constant C1, MSB
. . . . . . . . . . . . . . . . . .
^U 0x15 - Boundary Eqn Constant C1, LSB
. . . . . . . . . . . . . . . . . .
^V 0x16 - Boundary Equation Constant C2
. . . . . . . . . . . . . . . . . . .
^W 0x17 - Noise Sync
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6 Function Summary Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.7 Timing Limitations
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 PLD Source Listing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 Electrical Specifications
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.1 Absolute Maximum Specifications
. . . . . . . . . . . . . . . . . . . . . .
7.2 Recommended operating conditions
. . . . . . . . . . . . . . . . . . . . .
7.3 DC Specifications
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4 Timing
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.5 Maximum Drdy Response Delays
. . . . . . . . . . . . . . . . . . . . . . .
8 Mechanical
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.1 Dimensions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.2 Marking
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9 Index
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
3
0x32 - Reference Value
0x33 - R2R Offset
21
21
21
22
22
22
22
22
22
22
22
22
23
23
24
24
24
24
25
25
25
25
26
26
26
26
26
27
27
27
27
28
28
28
28
28
28
28
29
29
29
29
29
29
30
30
30
30
32
34
35
36
36
36
36
36
37
38
38
38
39
lQ
ii
www.qprox.com
QT60xx5B / R1.06
©Quantum Research Group Ltd.
Table 1.1 Device Pin List
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Name
MOSI
MISO
SCK
RST
Vdd
Vss
XTO
XTI
X0
X1
X2WS
X3
X4
X5
X6
XS
Vdd
Vss
YC0
YC1
YC2
YC3
YC4
YC5
YC6
YC7
AVdd
AGnd
Aref
YS2
YS1
YS0
CZ2
CZ1
CSR
Ain
MS
Vdd
Vss
LED
DRDY
X7
YG
SS
Type
I/O PP
I/O PP
I/O PP
I
Pwr
Pwr
O
I
O
O
O
O
O
O
O
O
Pwr
Pwr
O
O
O
O
O
O
O
O
Pwr
Pwr
Pwr
O
O
O
O
O
O
I
I/O OD
Pwr
Pwr
O
O OD
O
O
IO OD
Description
Master-Out / Slave In SPI line. In Master/Slave SPI mode is used for both communication directions.
In Slave SPI mode is the data input (in only).
Master-In / Slave Out SPI line. Not used in Master/Slave SPI mode.
In Slave mode outputs data to host (out only).
SPI Clock. In Master mode is an output; in Slave mode is an input
Reset input, active low reset
+5 supply
Ground
Oscillator drive output. Connect to resonator or crystal.
Oscillator drive input. Connect to resonator or crystal, or external clock source.
X0 Drive matrix scan / R2R DAC Ladder drive
X1 Drive matrix scan / R2R DAC Ladder drive
X2 Drive matrix scan / R2R DAC Ladder drive / Wake from Sleep / Sync to noise source
X3 Drive matrix scan / R2R DAC Ladder drive
X4 Drive matrix scan / R2R DAC Ladder drive
X5 Drive matrix scan / R2R DAC Ladder drive
X6 Drive matrix scan / R2R DAC Ladder drive
X summation / R2R DAC Ladder drive
+5 supply
Ground
Y 0 Line clamp control
Y 1 Line clamp control
Y 2 Line clamp control
Y 3 Line clamp control
Y 4 Line clamp control
Y 5 Line clamp control
Y 6 Line clamp control
Y 7 Line clamp control
+5 supply for analog sections
Analog ground
Analog reference, connect to Vcc
Transfer switch control bit 2
Transfer switch control bit 1
Transfer switch control bit 0
Charge cancellation drive for CZ2 capacitor
Charge cancellation drive for CZ1 capacitor
Charge integrator reset line. Active high or active low (select polarity via Setups)
Analog input from amplifier
SPI Mode / Sync out. Connect via 10k resistor to Vcc or Gnd for mode. Scope sync yields Pulse.
+5 supply
Ground
Active low LED status drive / Activity indicator
Data ready output for Slave SPI mode; active low
X7 Drive matrix scan
Y gate control to drive Y dwell timing circuit
Slave select for SPI direction control; active low
I/O:
I = Input
O = Output
Pwr = Power pin
I/O = Bi-directional line
PP = Push Pull output drive
OD = Open drain output drive
lQ
iii
www.qprox.com
QT60xx5B / R1.06
© Quantum Research Group Ltd.
1 Overview
QMatrix devices are digital burst mode charge-transfer (QT)
sensors designed specifically for matrix geometry touch
controls; they include all signal processing functions
necessary to provide stable sensing under a wide variety of
changing conditions. Only a few external parts are required
for operation. The entire circuit can be built within 8 square
centimeters of PCB area.
Figure 1-2 Sample Electrode Geometries
PARALLEL LINES
SERPENTINE
SPIRAL
Figure 1-1 Field flow between X and Y elements
overly ing panel
X
elem e nt
Y
elem ent
edge transitions of the X drive pulse. The charge emitted by
the X electrode is partly received onto the corresponding Y
electrode which is then processed. The parts use 8 'X'
edge-driven rows and 8 'Y' sense columns to permit up to 64
keys. Keys are typically formed from interleaved conductive
traces on a substrate like a flex circuit or PCB (Figure 1-2).
The charge flows are absorbed by the touch of a human
finger (Figure 1-3) resulting in a decrease in coupling from X
to Y. Thus, received signals decrease or go negative with
respect to the reference level during a touch.
Water films cause the coupled fields to increase slightly,
making water films easy to distinguish from touch.
QMatrix devices include charge cancellation methods which
allow for a wide range of key sizes and shapes to be mixed
together in a single touch panel. These features permit the
construction of entirely new classes of keypads never before
contemplated, such as touch-sliders, back-illuminated keys,
and complex warped panel shapes, all at very low cost.
1.2 Circuit Model
An electrical circuit model is shown in Figure 1-5. The
coupling capacitance between X and Y electrodes is
represented by Cx. While the reset switch is open, a sample
switch is gated so that it transfers charge flows only from the
rising edge of X into a charge integrator. On the falling edge
The devices use an SPI interface running at up to 1.5MHz to
of X, the switch connects the Y line to ground to allow the
allow key data to be extracted and to permit individual key
charge across Cx to neutralize to zero. The voltage change
parameter setup. The interface protocol uses simple single
on the output of the charge integrator after each X edge is
byte commands and responds with single byte responses in
most cases. The command structure is designed to minimize quite small, on the order of a few tens of millivolts. Changes
due to touch are typically under 0.1% of total integrator
the amount of data traffic while maximizing the amount of
voltage. The X pulse can be
information conveyed.
repeated in a burst of up to 64
Figure 1-3 Field Flows When Touched
In addition to normal operating
pulses to increase the change in
and setup functions the device
integrator output voltage due to
can also report back actual
touch during an acquire (Section
signal strengths and error codes.
3.6) to increase gain.
QmBtn software for the PC can
be used to program the IC as
well as read back key status and
signal levels in real time.
QMatrix parts employ transverse
charge-transfer ('QT') sensing, a
new technology that senses
changes in the charge forced
across an electrode by a digital
edge.
The parts are electrically
identical with the exception of the
number of keys which may be
sensed.
ov e rly in g pan el
X
elem e nt
Y
elem ent
Figure 1-4 Fields With a Conductive Film
The charge detector is an opamp
configured as an integrator with a
reset switch; this creates a virtual
ground input, making the Y lines
appear low impedance when the
sample switch is closed. This
configuration effectively
eliminates cross-coupling among
Y lines while greatly lowering
susceptibility to EMI. The circuit
is also highly immune to
capacitive loading on the Y lines,
since stray C from Y to ground
appears merely as a small
parallel capacitance across a
virtual ground.
The circuit uses an 8-bit ADC,
with a subranging structure to
effectively deliver a 14-bit total
conversion 'space' (see Figure
1-6 and Section 3.3). In this way
the circuit can tolerate very large
1.1 Field Flows
Figure 1-1 shows how charge is
transferred across an electrode
set to permeate the overlying
panel material; this charge flow
exhibits a high dQ/dt during the
lQ
4
www.qprox.com
QT60xx5B / R1.06
© Quantum Research Group Ltd.
Figure 1-5 QT60xx5B Basic Circuit Model
X drive
X drive
(1 of 8)
(1 of 8)
Xn
Xn
X
electrode
electrod e
Y line
Y line
(1
of
f
8)
(1
o 8)
Sample
Sample
switch (1 of 8)
switch (1 o f 8)
0
0
1
1
Cx
Cx
Y
electrode
e lectrod e
Cancellation
Cancellatio n
switches
switches
Res et sw itch
Reset sw itch
0
0
1
1
Cz1
Cz1
Short sample gate dwell times after the X
edges will limit the effect of moisture
spreading from key to key by taking
advantage of the RC filter-like nature of
continuous films; a short dwell time will limit
the time that the charge has to travel
through the impedance of the film (Section
3.13). This effect is independent of the
frequency of burst repetition, intra-burst
pulse spacing, or X drive pulse width.
Burst mode operation permits reduced
power consumption and reduces RF
emissions, while permitting excellent
response time.
+
+
+
+
Cs
Cs
To 60xxx AD C
60 xxx
mp
Am p
C ha rge
C ha rg e
In te gra
or
In te gr at
tor
Ca
Ca
Cz2
Cz2
X
X n
n
R eset
R eset
sw itch
switch
Sample
S ample
sw itch
sw itch
1.3 Matrix Configuration
The matrix scanning configuration is shown
in Figure 1-5. The ‘X’ drives are sequentially
pulsed in groupings of bursts; an 8:1 analog
V
V
mux acts as the sample switch for all ‘Y’
lines. At the intersection of each ‘X’ and ‘Y’
line in the matrix itself, where a key is
desired, should be an interdigitated electrode set similar to
those shown in Figure 1-2. The outermost electrode or the
key border should always be connected to an ‘X’ drive;
flooding the area around keys with X fill to a width of up to
10mm can help in suppressing moisture films further.
ou
ou t
t
From 60xxx
O ffset Control
8-bit
8-bit
Offset DAC
O ffset DAC
A mp
A mp
out
out
0
0
absolute signals yet still respond to very small signal
changes. Subranging is provided by two offset mechanisms
which can be thought of as 'coarse' and 'fine' offsets.
The 'coarse' method uses one or two switched Cz capacitors
to subtract charge from the charge integrator to create up to
two step offsets, to bring the analog signal back to a more
reasonable level. This action occurs during the course of the
burst.
The 'fine' method of offset uses an 8-bit R2R ladder DAC
driven by the X drive lines to create an offset in the amplifier
stage. The DAC is driven after the burst has ceased and the
charge accumulated, so there is no conflict in this dual-use of
the X lines.
Although it is referred to as a ‘matrix’, there is no restriction
on where individual keys can be located. The term ‘matrix’
refers to the electrical configuration of keys, not the physical
arrangement.
Consult Quantum for application assistance on
key design.
1.4 Communications
The device uses two variants of SPI communications,
Slave-only and Master-Slave. Over this interface is a
command and data transfer structure
designed for high levels of flexibility using
Figure 1-6 Circuit Block Diagram (8x8 Matrix Shown)
minimal numbers of bytes. For more
Y0 Y1 Y2 Y 3 Y 4 Y 5 Y 6 Y 7
X0
information see Sections 4 and 5.
X0
X2
X2
X3
X4
X5
X6
X7
X3
X4
X5
X6
X7
XS
YC0
Y C1
YC2
Y C3
YC4
Y C5
YC6
Y C7
.
.
.
.
.
.
.
.
SP I
to
Host
K EYMATRIX
Transfer
M ux
+
X1
X1
Device variations:
Refer to Section 3.1 for
differences between the parts covered by
this datasheet.
✟
X
{1. .7 }
X7
2 Signal Processing
The devices calibrate and process all
signals using a number of algorithms
specifically designed to provide for high
survivability in the face of adverse
environmental challenges. They provide a
large number of processing options which
can be user-selected to implement very
flexible, robust keypanel solutions.
Timin g &
Ch arge
N eutralizin g
C ontrol
(PL D)
Transfer S trobe
Transfer S elect
Y S0. .Y S2
X0 .
.
X2 .
X3
.
X4 .
X5
.
X6 .
XS
.
X1
Q T60xx 5
AIN
R 2R
DA C
Signal Offset
C harge
Integrator
G ain
A mp
✟
“
C
Z2
2.1 Negative Threshold
See also command ^A, page 24
The negative threshold value is established
relative to a key’s signal reference value.
The threshold is used to determine key
touch when crossed by a negative-going
signal swing after having been filtered by
✟
-
C SR
C z1
C z2
Integrator R eset
C harge C ancellation 1
C harge C ancellation 2
C
Z1
lQ
5
www.qprox.com
QT60xx5B / R1.06
ARM技术
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