SM5902AF
NIPPON PRECISION CIRCUITS INC.
compression and non compression type
shock-proof memory controller
Overview
The SM5902 is a compression and non compres-
sion type shock-proof memory controller LSI for
compact disc players. The compression level can
be set in 4 levels, and external memory can be
selected from 4 options (1M, 4M, 4M× 2, 16M).
Digital attenuator, soft mute and related functions
are also incorporated. It operates from a 2.4 to 5.5
V wide supply voltage range.
Features
- 2-channel processing
- Serial data input
⋅
2s complement, 16-bit/MSB first, right-justified
format
⋅
Wide capture function
(up to 3
×
speed input rate)
- System clock input
⋅
384fs (16.9344 MHz)
- Shock-proof memory controller
⋅
ADPCM compression method
⋅
4-level compression mode selectable
4-bit compression mode 2.78 s/Mbit
5-bit compression mode 2.22 s/Mbit
6-bit compression mode 1.85 s/Mbit
Full-bit non compression mode 0.74 s/Mbit
⋅
4 external DRAM configurations selectable
1
×
16M DRAM (4M
×
4 bits, refresh cycle =
2048 cycle)
1
×
or 2
×
4M DRAM (1M
×
4 bits)
1
×
1M DRAM (256k
×
4 bits)
⋅
DRAM at 5V operation is usable for Low-volt-
age operation
- Compression mode selectable
- Microcontroller interface
⋅
Serial command write and status read-out
⋅
Data residual detector:
15-bit operation, 16-bit output
⋅
Digital attenuator
8-bit setting
⋅
Soft attenuator function
Noiseless attenuation-level switching
(256- step switching in 23 ms max.)
⋅
Soft mute function
Mute ON in 23 ms max.
Direct return after soft mute release
⋅
Forced mute
- Extension I/O
Microcontroller interface for external control
using 5 extension I/O pins
- +2.4 to +5.5 V wide operating voltage range
- Schmitt inputs
All input pins (including I/O pins) except CLK
(system clock)
- Reset signal noise elimination
Approximately 3.8
µs
or longer (65 system
clock pulses) continuous LOW-level reset
- Digital audio interface (DIT)
- 44-pin QFP package (0.8 mm pin pitch)
Ordering Information
SM5902AF
44pin QFP
NIPPON PRECISION CIRCUITS-1
SM5902AF
Package dimensions
(Unit: mm)
44-pin QFP 1
12.80 + 0.30
10.00 + 0.30
(1.40)
12.80 + 0.30
10.00 + 0.30
0 to 10
0.60 + 0.20
0.80
0.35 + 0.10
0.20
M
(1.45)
0.10 + 0.10
0.17 + 0.05
0.15
44-pin QFP 2
12.80 0.30
10.00 0.30
+ 0.20
1.55 0.10
0.17 0.05
(1.40)
12.80 0.30
10.00 0.30
0 to 10
4
0.80
0.35 0.10
0.15
0.20
M
Pinout
(Top View)
A3
A2
A1
A0
A4
A5
A6
A7
A8
A9
NRAS
34
33
32
31
30
29
28
27
26
25
24
23
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
0.20
1.50 0.10
(1.40)
0.10
0.10 0.05
C0
.7
0.60 0.20
38
37
36
VDD2
UC1
UC2
UC3
UC4
UC5
DIT
NTEST
CLK
VSS
YSRDATA
35
1
2
3
4
5
6
7
8
9
10
11
NWE
D1
D0
D3
D2
NCAS
A10/ NCAS2
YMCLK
YMDATA
YMLD
YDMUTE
YBLKCK
NRESET
ZSENSE
YFCLK
ZSRDATA
ZLRCK
YLRCK
YFLAG
VDD1
SM5 9 0 2 A F
ZSCK
YSCK
NIPPON PRECISION CIRCUITS-2
SM5902AF
Pin description
Pin number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Pin name
VDD2
UC1
UC2
UC3
UC4
UC5
DIT
NTEST
CLK
VSS
YSRDATA
YLRCK
YSCK
ZSCK
ZLRCK
ZSRDATA
YFLAG
YFCLK
YBLKCK
NRESET
ZSENSE
VDD1
YDMUTE
YMLD
YMDATA
YMCLK
A10
(NCAS2)
NCAS
D2
D3
D0
D1
NWE
NRAS
A9
A8
A7
A6
A5
A4
A0
A1
A2
A3
I/O
-
Ip/O
Ip/O
Ip/O
Ip/O
Ip/O
O
Ip
I
-
I
I
I
O
O
O
I
I
I
I
O
-
I
I
I
I
O
O
O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
Function
H
VDD supply pin
Microcontroller interface extension I/O 1
Microcontroller interface extension I/O 2
Microcontroller interface extension I/O 3
Microcontroller interface extension I/O 4
Microcontroller interface extension I/O 5
Digital audio interface
Test pin
16.9344 MHz clock input
Ground
Audio serial input data
Audio serial input LR clock
Audio serial input bit clock
Audio serial output bit clock
Audio serial output LR clock
Audio serial output data
Signal processor IC RAM overflow flag
Crystal-controlled frame clock
Subcode block clock signal
System reset pin
Microcontroller interface status output
VDD supply pin
Forced mute pin
Microcontroller interface latch clock
Microcontroller interface serial data
Microcontroller interface shift clock
DRAM address 10
DRAM2 CAS control (with 2 DRAMs)
DRAM CAS control
DRAM data input/output 2
DRAM data input/output 3
DRAM data input/output 0
DRAM data input/output 1
DRAM WE control
DRAM RAS control
DRAM address 9
DRAM address 8
DRAM address 7
DRAM address 6
DRAM address 5
DRAM address 4
DRAM address 0
DRAM address 1
DRAM address 2
DRAM address 3
Mute
Reset
Overflow
Left channel
Right channel
Left channel
Right channel
Test
Setting
L
Ip : Input pin with pull-up resistor
Ip/O : Input/Output pin (With pull-up resistor when in input mode)
NIPPON PRECISION CIRCUITS-3
SM5902AF
Absolute maximum ratings
Parameter
Supply voltage
Input voltage
Storage temperature
Power dissipation
Soldering temperature
Soldering time
Symbol
V
DD
V
I
T
STG
P
D
T
SLD
(V
SS
= 0V, VDD1, VDD2 pin voltage = V
DD
)
Rating
Unit
- 0.3 to 7.0
V
SS
- 0.3 to V
DD
+ 0.3
- 55 to 125
350
255
10
V
V
˚C
mW
˚C
sec
t
SLD
(*1) Refer to pin summary on the next page.
Note. Values also apply for supply inrush and switch-off.
Electrical characteristics
Recommended operating conditions
(V
SS
= 0V, VDD1, VDD2 pin voltage = V
DD
)
Parameter
Supply voltage
Operating temperature
Symbol
V
DD
T
OPR
Rating
2.4 to 5.5
- 40 to 85
Unit
V
˚C
DC characteristics
Standard voltage: (V
DD1
= V
DD2
= 4.5 to 5.5 V, V
SS
= 0 V, Ta = - 40 to 85 ˚C)
Parameter
Current consumption
Input voltage
Pin
VDD
CLK
H level
L level
(*2,3,4)
(*5)
Output voltage
(*4,6)
(*5,7)
Input current
CLK
(*3,4)
Input leakage current
(*2,3,4,5)
(*2,5)
H level
L level
H level
L level
H level
L level
H level
L level
I
IH1
I
IL1
I
IL2
I
LH
I
LL
Symbol
I
DD
V
IH1
V
IL1
V
INAC
V
IH2
V
IL2
V
IH3
V
IL3
V
OH1
V
OL1
V
OH2
V
OL2
I
OH
= - 0.5 mA
I
OL
= 0.5 mA
I
OH
= - 0.5 mA
I
OL
= 0.5 mA
V
IN
= V
DD
V
IN
= 0V
V
IN
= 0V
V
IN
= V
DD
V
IN
= 0V
40
40
6
95
95
12
V
DD
- 0.4
0.4
190
190
25
1.0
1.0
V
DD
- 0.4
0.4
0.6V
DD
0.2V
DD
AC coupling
0.3
0.7V
DD
0.3V
DD
Condition
Min
(*A)SHPRF ON
(*A)Through mode
0.7V
DD
0.3V
DD
Rating
Typ
13.5
5.0
Max
25.0
7.5
mA
mA
V
V
V
P-P
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
Unit
(*A) V
DD1
= V
DD2
= 5 V, CLK input frequency f
XTI
= 384fs = 16.9344 MHz, all outputs unloaded,
SHPRF: Shock-proof,
typical values are for V
DD1
= V
DD2
= 5 V.
NIPPON PRECISION CIRCUITS-4
SM5902AF
Low-voltage:(V
DD1
= V
DD2
= 2.4 to 4.5 V, V
SS
= 0 V, Ta = - 20 to 70 ˚C)
Parameter
Current consumption
Input voltage
Pin
VDD
CLK
H level
L level
(*2,3,4)
(*5)
Output voltage
(*4,6)
(*5,7)
Input current
CLK
(*3,4)
Input leakage current
(*2,3,4,5)
(*2,5)
H level
L level
H level
L level
H level
L level
H level
L level
I
IH1
I
IL1
I
IL2
I
LH
I
LL
Symbol
I
DD
V
IH1
V
IL1
V
INAC
V
IH2
V
IL2
V
IH3
V
IL3
V
OH1
V
OL1
V
OH2
V
OL2
I
OH
= - 0.5 mA
I
OL
= 0.5 mA
I
OH
= - 0.5 mA
I
OL
= 0.5 mA
V
IN
= V
DD
V
IN
= 0V
V
IN
= 0V
V
IN
= V
DD
V
IN
= 0V
10
10
1.5
30
30
3
V
DD
- 0.4
0.4
115
115
15
1.0
1.0
V
DD
- 0.4
0.4
0.6V
DD
0.2V
DD
AC coupling
0.3
0.7V
DD
0.3V
DD
Condition
Min
(*B)SHPRF ON
(*B)Through mode
0.7V
DD
0.3V
DD
Rating
Typ
6.0
2.5
Max
12.0
4.0
mA
mA
V
V
V
P-P
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
Unit
(*B) V
DD1
= V
DD2
= 3 V, CLK input frequency f
XTI
= 384fs = 16.9344 MHz, all outputs unloaded,
SHPRF: Shock-proof,
typical values are for V
DD1
= V
DD2
= 3 V.
<Pin summary>
(*1)
(*2)
Pin function
Pin name
Pin function
Pin name
(*3)
(*4)
(*5)
(*6)
(*7)
Pin function
Pin name
Pin function
Pin name
Pin function
Pin name
Pin function
Pin name
Pin function
Pin name
Clock input pin (AC input)
CLK
Schmitt input pins
YSRDATA, YLRCK, YSCK, YFLAG, YFCLK, NRESET,
YBLKCK, YDMUTE, YMLD, YMDATA, YMCLK
Schmitt input pin with pull-up
NTEST
I/O pins (Schmitt input with pull-up in input state)
UC1, UC2, UC3, UC4, UC5
I/O pins (Schmitt input in input state)
D0, D1, D2, D3
Outputs
ZSCK, ZLRCK, ZSRDATA, ZSENSE, DIT
Outputs
NCAS, NWE, NRAS, A0, A1, A2, A3, A4, A5, A6, A7, A8, A9,A10
NIPPON PRECISION CIRCUITS-5
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