Megawin Technology Co., Ltd.
1.0 General Description
MG87FE/L52
MG87FE/L52 is a single-chip 8 bits microcontroller with the instruction sets fully compatible
with industrial-standard 80C51 series microcontroller. 8K bytes flash memory and 256 bytes
RAM has been embedded to provide wide field application. In-System-Programming and
In-Application-Programming allow the users to download new code or data while the
microcontroller sits in the application. This device executes one machine cycle in 6 clock or 12
clock cycles. MG87FE/L52 has four 8-bit I/O ports, one 4-bit I/O ports, three 16-bit
timer/counters, an eight-source, four-priority-level interrupt structure, an enhanced UART,
on-chip crystal oscillator.
Excellent flash-endurance, flash-retention, and code-protecting security make MG87FE/L52 as
an excellent micro-controller.
2.0 Features
80C51 Central Processing Unit
8KB On-Chip program memory for program ROM, ISP ROM & IAP zone.
ISP capability; optional 0.5K/1KB/1.5K~3.5KB ISP memory shared with 8KB flash memory.
IAP capability; program controlled IAP memory size shared with 8KB flash memory.
On-Chip 256 bytes scratch-pad RAM. Also, the MCU can address up to 64K bytes external
memory.
MOVC-disabling, encrypting, and locking flash memory realize security mechanism.
Three 16-bits timer/counter, Timer2 is an up/down counter with programmable clock output
on P1.0
Eight sources, four-level-priority interrupt capability
Enhanced UART, provides frame-error detection and hardware address-recognition
Dual DPTR for fast-accessing of data memory
15 bits Watch-Dog-Timer with 8-bits pre-scaler, one-time enabled
Low EMI: inhibits ALE emission
Power control: Idle mode and Power-Down mode; Power-Down can be woken-up by
P3.2/P3.3/P4.2/P4.3, Idle mode could be woken up by all interrupt sources.
I/O port: 32+4 I/O ports :
-
PDIP-40 (MG87FE/L52AE or MG87FE/L52GE) has 32 I/O ports;
Preliminary
ver 1.3
Date: 2009-JAN-20
1
Megawin Technology Co., Ltd.
-
MG87FE/L52
PLCC-44 & PQFP-44(MG87FE/L52AP//AF, MG87FE/L52AF//GF) will have 36 I/O
ports
On-Chip flash program/data memory:
- The data endurance of the embedded flash gets over 20,000 times.
- Greater than 100 years data retention under room temperature. (at 25℃)
Operating Voltage:
- 4.5V~5.5V for MG87FE52
- 2.4V~3.6V for MG87FL52, minimum 2.7V requirement in flash write operation
- Built-in Low-Voltage-Reset circuit
Operating Temperature range from -40°C to +85°C.
Maximum Operating Frequency:
- Up to 48MHz at 12T mode or 24MHz at 6T mode, Industrial range.
Built-in internal oscillator frequency selection with +/- 4% deviation:
Internal oscillator frequency
1
2
3
4
5
6
6MHz
11.059MHz
12MHz
22.118MHz
24MHz
24.576MHz
Three package types:
Pb-free Package
PDIP-40
PLCC-44
PQFP-44
MG87FE/L52AE
MG87FE/L52AP
MG87FE/L52AF
Green Package
MG87FE/L52GE
MG87FE/L52GP
MG87FE/L52GF
Preliminary
ver 1.3
Date: 2009-JAN-20
2
Megawin Technology Co., Ltd.
3.0 Package & Pin assignment
MG87FE/L52
3.1 Order Information
Preliminary
ver 1.3
Date: 2009-JAN-20
3
Megawin Technology Co., Ltd.
4.0 Pin description
Pin Number
Pin Name
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
P1.0 (T2)
P1.1 (T2EX)
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
DIP-40
39
38
37
36
35
34
33
32
1
2
3
4
5
6
7
8
PLCC-44
43
42
41
40
39
38
37
36
2
3
4
5
6
7
8
9
PQFP-44
37
36
35
34
33
32
31
30
40
41
42
43
44
1
2
3
Type
MG87FE/L52
Description
I/O Port0 is an open-drain, bi-directional
IO port. When
1s
are written to Port0,
they become high-impedance inputs.
Port0 is also multiplexed with low-order
address or data bus during accesses
to external program and data memory.
I/O Port 1 is an 8-bit bidirectional I/O port
with internal pull-ups and can be used
as inputs. Port 1 pins that have 1s
written to them are pulled high by the
internal pull-ups and can be used as
inputs. As inputs, port 1 pins that are
externally pulled low will source current
because of the internal pull-ups.
P1.0 is also used as one of event
sources for timer2, or output carrier of
timer2, alias T2.
P1.1
is
also
used
as
one
of
interrupt-controlling sources for timer2,
alias T2EX.
P2.0 (A8)
P2.1 (A9)
P2.2 (A10)
P2.3 (A11)
P2.4 (A12)
P2.5 (A13)
P2.6 (A14)
P2.7 (A15)
21
22
23
24
25
26
27
28
24
25
26
27
28
29
30
31
18
19
20
21
22
23
24
25
I/O Port 2 is an 8-bit bidirectional I/O port
with internal pull-ups and can be used
as inputs. Port 2 pins that have 1s
written to them are pulled high by the
internal pull-ups and can be used as
inputs. As inputs, port 2 pins that are
externally pulled low will source current
because of the internal pull-ups.
Except being as GPIO, Port2 emits the
high-order address bytes during
accessing to external program and
data memory.
Preliminary
ver 1.3
Date: 2009-JAN-20
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Megawin Technology Co., Ltd.
P3.0 (RXD)
P3.1 (TXD)
P3.2 (INT0)
P3.3 (INT1)
P3.4 (T0)
P3.5 (T1)
P3.6 (/WR)
P3.7 (/RD)
10
11
12
13
14
15
16
17
11
13
14
15
16
17
18
19
5
7
8
9
10
11
12
13
MG87FE/L52
I/O Port 3 is an 8-bit bidirectional I/O port
with internal pull-ups and can be used
as inputs. Port 3 pins that have 1s
written to them are pulled high by the
internal pull-ups and can be used as
inputs. As inputs, port 3 pins that are
externally pulled low will source current
because of the internal pull-ups. Port3
also serves other special functions of
this device.
P3.0 and P3.1 act as receiver and
transceiver of the data for UART
function block, Alias RXD and TXD.
P3.2 and P3.3 also act as external
interrupt sources, alias INT0 and INT1.
P3.4 and P3.5 also act as event
sources for timer0 and
individually, alias T0 and T1.
timer1
P3.6 also acts as write signal while
access to external memory, alias /WR.
P3.7 also acts as read signal while
access to external memory, alias /RD.
P4.0
P4.1
P4.2 (/INT3)
P4.3 (/INT2)
RESET
9
23
34
1
12
10
17
28
39
6
4
I
I/O Port4 is extended I/O ports such like
Port1. It can be available only on
44L-PLCC and 44L-PQFP package.
P4.2 and P4.3 also act as external
interrupt sources, alias INT3 and INT2.
A high on this pin for at least two
machine cycles will reset the device.
ALE
30
33
27
O
Output pulse for latching the low bytes
of address during accesses to external
memory.
/PSEN
29
32
26
O
The read strobe to external program
memory, low active.
/EA
31
35
29
I
/EA must be kept at low to enable the
device to fetch program code from
external flash memory.
An internal pull-up resistor has been
embedded in this pin.
XTAL1
XTAL2
19
18
21
20
15
14
I
O
Input to
amplifier.
the
inverting
oscillator
Output from the inverting amplifier.
Preliminary
ver 1.3
Date: 2009-JAN-20
5
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