PRELIMINARY
SemiWell
Semiconductor
SFP95N03L
Logic N-Channel MOSFET
Features
■
■
■
■
■
■
Low R
DS
(on) (0.0085Ω )@V
GS
=10V
Low Gate Charge (Typical 39nC)
Low Crss (Typical 185pF)
Improved dv/dt Capability
100% Avalanche Tested
Maximum Junction Temperature Range (175°C)
Symbol
●
2. Drain
1. Gate
◀
●
●
▲
3. Source
General Description
This Power MOSFET is produced using SemiWell’s advanced
planar stripe, DMOS technology. This latest technology has been
especially designed to minimize on-state resistance, have a low
gate charge with superior switching performance, and rugged
avalanche characteristics. This Power MOSFET is well suited
for synchronous DC-DC Converters and Power Management in
portable and battery operated products.
TO-220
1 2
3
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
dv/dt
P
D
T
STG,
T
J
T
L
Drain to Source Voltage
Continuous Drain Current(@T
C
= 25
°C)
Continuous Drain Current(@T
C
= 100
°C)
Drain Current Pulsed
Gate to Source Voltage
Single Pulsed Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation(@T
C
= 25 °C)
Derating Factor above 25 °C
Operating Junction Temperature & Storage Temperature
Maximum Lead Temperature for soldering purpose,
1/8 from Case for 5 seconds.
(Note 2)
(Note 3)
(Note 1)
(Note 6)
Parameter
Value
30
95
67.3
380
Units
V
A
A
A
V
mJ
V/ns
W
W/°C
°C
°C
±
20
450
7.0
150
1.0
- 55 ~ 175
300
Thermal Characteristics
Symbol
R
θJC
R
θCS
R
θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case to Sink
Thermal Resistance, Junction-to-Ambient
Value
Min.
-
-
-
Typ.
-
0.5
-
Max.
1.0
-
62.5
Units
°C/W
°C/W
°C/W
September, 2002. Rev. 0.
Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
1/7
SFP95N03L
Electrical Characteristics
Symbol
Off Characteristics
BV
DSS
Δ
BV
DSS
/
Δ
T
J
I
DSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
coefficient
Drain-Source Leakage Current
Gate-Source Leakage, Forward
Gate-Source Leakage, Reverse
V
GS
= 0V, I
D
= 250uA
I
D
= 250uA, referenced to 25 °C
V
DS
= 30V, V
GS
= 0V
V
DS
= 24V, T
C
= 150 °C
V
GS
= 20V, V
DS
= 0V
V
GS
= -20V, V
DS
= 0V
V
DS
= V
GS
, I
D
= 250uA
V
GS
=10 V, I
D
= 47.5A
V
GS
=5 V, I
D
= 47.5A
30
-
-
-
-
-
-
0.023
-
-
-
-
-
-
1
10
100
-100
V
V/°C
uA
uA
nA
nA
( T
C
= 25 °C unless otherwise noted )
Parameter
Test Conditions
Min
Typ
Max
Units
I
GSS
On Characteristics
V
GS(th)
R
DS(ON)
Gate Threshold Voltage
Static Drain-Source On-state Resis-
tance
1.0
-
-
-
0.0065
0.0085
3.0
0.0085
0.0115
V
Ω
Dynamic Characteristics
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
GS
=0 V, V
DS
=25V, f = 1MHz
-
-
-
1015
845
185
1320
1110
240
pF
Dynamic Characteristics
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge(Miller Charge)
V
DS
=24V, V
GS
=5V, I
D
=95A
※
see fig. 12.
(Note 4, 5)
-
V
DD
=15V, I
D
=95A, R
G
=50Ω
※
see fig. 13.
(Note 4, 5)
45
165
70
140
39
13
18
100
340
150
290
51
-
-
nC
ns
-
-
-
-
-
-
Source-Drain Diode Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Parameter
Continuous Source Current
Pulsed source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Test Conditions
Integral Reverse p-n Junction
Diode in the MOSFET
I
S
=95A, V
GS
=0V
I
S
=95A,V
GS
=0V,dI
F
/dt=100A/us
Min.
-
-
-
-
-
Typ.
-
-
-
55
65
Max.
95
380
1.5
-
-
Unit.
A
V
ns
nC
※
NOTES
1. Repeativity rating : pulse width limited by junction temperature
2. L = 50 uH, I
AS
=95A, V
DD
= 15V, R
G
= 0Ω , Starting T
J
=
25°C
3. ISD
≤
95A, di/dt
≤
300A/us, V
DD
≤
BV
DSS
, Starting T
J
=
25°C
4. Pulse Test : Pulse Width
≤
300us, Duty Cycle
≤
2%
5. Essentially independent of operating temperature.
6. Continuous Drain current calculated by maximum junction temperature ; limited by package
2/7
Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
SFP95N03L
Fig 1. On-State Characteristics
V
GS
10.0 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0 V
Top :
Fig 2. Transfer Characteristics
10
2
I
D
, Drain Current [A]
10
I
D
, Drain Current [A]
2
10
1
175 C
25 C
o
o
10
0
-55 C
※
Notes :
1. V
DS
= 15V
2. 250µ s Pulse Test
o
10
1
※
Notes :
1. 250µ s Pulse Test
2. T
C
= 25
℃
-1
0
1
10
10
10
10
-1
0
2
4
6
8
10
12
V
DS
, Drain-Source Voltage [V]
V
GS
, Gate-Source Voltage [V]
Fig 3. On Resistance Variation vs.
Drain Current and Gate Voltage
20
Fig 4. On State Current vs.
Allowable Case Temperature
R
DS(ON)
[mΩ ],
Drain-Source On-Resistance
15
V
GS
= 5V
V
GS
= 10V
I
DR
, Reverse Drain Current[A]
10
2
10
1
10
175
℃
10
0
25
℃
※
Notes :
1. V
GS
= 0V
2. 250µ s Pulse Test
5
※
Note : T
J
= 25
℃
0
0
100
200
300
400
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
I
D
, Drain Current [A]
V
SD
, Source-Drain voltage[V]
Fig 5. Capacitance Characteristics
6000
C
iss
=C
gs
+C
gd
(C
ds
=shorted)
C
oss
=C
ds
+C
gd
C
rss
=C
gd
Fig 6. Gate Charge Characteristics
12
V
GS
, Gate-Source Voltage [V]
5000
10
V
DS
= 15V
V
DS
= 24V
Capacitance [pF]
4000
※
Notes :
1. V
GS
= 0V
2. f=1MHz
8
3000
6
C
iss
2000
4
C
oss
1000
2
※
Note : I
D
= 95 A
C
rss
0
0
5
10
15
20
25
30
35
0
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
V
DS
, Drain-Source Voltage [V]
Q
g
, Total Gate Charge [nC]
3/7
Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
SFP95N03L
Fig 7. Breakdown Voltage Variation
1.2
3.0
Fig 8. On-Resistance Variation
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
1.1
R
DS(ON)
, (Normalized)
Drain-Source On-Resistance
2.5
2.0
1.0
1.5
1.0
0.9
※
Notes :
1. V
GS
= 0 V
2. I
D
= 250 µ A
0.5
※
Notes :
1. V
GS
= 10 V
2. I
D
= 47.5 A
0.8
-100
-50
0
50
100
o
150
200
0.0
-100
-50
0
50
100
o
150
200
T
J
, Junction Temperature [ C]
T
J
, Junction Temperature [ C]
Fig 9. Maximum Safe Operating Area
100
10
3
Fig 10. Maximum Drain Current
vs. Case Temperature
Limited by Package
Operation in This Area
is Limited by R
DS(on)
10
2
1 ms
10 ms
DC
I
D
, Drain Current [A]
100
µ
s
80
I
D
, Drain Current [A]
60
10
1
40
※
Notes :
1. T
C
= 25 C
o
20
10
0
2. T
J
= 175 C
3. Single Pulse
-1
o
10
10
0
10
1
0
25
50
75
100
125
150
175
V
DS
, Drain-Source Voltage [V]
T
C
, Case Temperature [
℃
]
Fig 11. Transient Thermal Response Curve
10
0
Z
θ
JC
Thermal Response
(t),
D = 0 .5
0 .2
10
-1
0 .1
0 .0 5
0 .0 2
0 .0 1
※
N o te s :
1 . Z
θ
JC
= 1 .0
℃
/W M a x.
(t)
2 . D u ty F a c to r, D = t
1
/t
2
3 . T
JM
- T
C
= P
D M
* Z
θ
JC
(t)
s in g le p u ls e
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t
1
, S q u a re W a ve P u ls e D u ra tio n [s e c ]
4/7
Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
SFP95N03L
Fig. 12. Gate Charge Test Circuit & Waveforms
50K
Ω
12V
200nF
300nF
Same Type
as DUT
V
DS
V
GS
Q
g
5V
Q
gs
Q
gd
V
GS
DUT
1mA
Charge
Fig 13. Switching Time Test Circuit & Waveforms
V
DS
R
L
V
DD
( 0.5 rated V
DS
)
V
DS
90%
5V
Pulse
Generator
R
G
DUT
V
in
10%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
V
DS
I
D
R
G
L
V
DD
BV
DSS
1
E
AS
= ---- L
L
I
AS2
--------------------
2
BV
DSS
-- V
DD
BV
DSS
I
AS
I
D
(t)
10V
DUT
V
DD
t
p
V
DS
(t)
Time
5/7
Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
工业自动化与控制
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
