King Billion Electronics Co., Ltd
SF23C3200B
駿
億
電
子
股
½
有
限
公
司
- Table of Contents -
1.
2.
3.
4.
5.
6.
7.
8.
General Description_______________________________________________________________2
Features ________________________________________________________________________2
Functional block diagram __________________________________________________________2
Pin Description __________________________________________________________________3
Pad Location ____________________________________________________________________5
Absolute Maximum Rating _________________________________________________________6
AC Electrical Characteristics _______________________________________________________6
DC Electrical Characteristics _______________________________________________________7
December 8, 2003
Page 1 of 7
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C3200B
駿
億
電
子
股
½
有
限
公
司
1. General Description
The SF23C3200B is a fully static, 32 Mbit CMOS Mask Programmable ROM. This device operates in
wide operating range. It requires no external clock for its operation and suitable for use with
microprocessor program memory, and data memory (speech, graphic, etc).
2. Features
Operating range: 2.4V ~ 3.6V
Organization
- Memory Cell Array: 4M x 8 or 2M x 16 selectable by BYTEB pin
Low Operation Current (Typical)
-
-
10
µA
standby mode current.
30 mA active read current at 100 ns cycle time.
Fully static operation
Tri-state outputs
Package: bare chip
3. Functional block diagram
X BUFFER &
DECODER
[A20..A-1]
Y BUFFER &
DECODER
MEMORY
CELL
ARRAY
CEn
OEn
BYTEB
CONTROL
LOGIC
SENSE AMP.
[Q15..Q0]
December 8, 2003
Page 2 of 7
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C3200B
駿
億
電
子
股
½
有
限
公
司
4. Pin Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
SF23C3200
A20
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BY TE
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
Symbol
A18, A17
A7 ~ A0
CEn
Pin No.
1, 2
3 ~ 10
11
GND
OEn
Q0,
Q1,
Q2,
Q3,
Q4,
Q5,
Q6,
Q7,
Q8,
Q9,
Q10,
Q11,
Q12,
Q13,
Q14,
Q15A-1,
VCC
12
13
14,
16,
18,
20,
23,
25,
27,
29
15,
17,
19,
21,
24,
26,
28,
30
22
I/O
Description
I Mask ROM Address input pins.
I Mask ROM Address input pins.
I The CEn (Chip Enable) input is the device selection and power control for
internal Mask ROM array. Whenever CEn goes high, the internal Mask
ROM will enter standby (power saving) mode. Otherwise, it is in active
mode and the contents of the ROM can be accessed.
P Negative power supply input pin.
I OEn (Output Enable) is the output control which gates ROM array data onto
the data output pins Q7 ~ Q0 in Byte mode (BYTEB pin is at “low” state) or
Q15A-1, Q14 ~ Q0 in Word mode (BYTEB pin is at “high” state).
O, Mask ROM array Data lower byte outputs drive Q7 ~ Q0 pins during read
O, operations (CEn and OEn are “low”). The Q7 ~ Q0 pins stay in high-Z when
O, the chip is deselected (CEn high) or when the outputs are disabled (OEn
O, high).
O,
O,
O,
O,
O, Mask ROM data higher byte output pins when Word mode is selected
O, (BYTEB is at “high” level) during read operations (CEn and OEn are
O, “low”). They will be tri-stated when Byte mode is selected (BYTEB at
O, “low” level), the chip is deselected (CEn high), the outputs are disabled
O, (OEn high).
O,
O,
O/I, Q15A-1 is Mask ROM MSB Data output pin in Word mode and LSB
address pin in Byte mode.
P Positive power supply input pin.
Page 3 of 7
V1.1
December 8, 2003
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C3200B
駿
GND
BYTEB
A16 ~ A8
A19, A20
31
32
33 ~ 41
42, 43
P
I
I
I
億
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股
½
有
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Negative power supply input pin.
Byte/Word mode selection input pin. Byte mode is selected when it is at
“low” state, otherwise Word mode is selected.
Mask ROM Address input pins.
Mask ROM Address input pins.
December 8, 2003
Page 4 of 7
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C3200B
駿
億
電
子
股
½
有
限
公
司
5. Pad Location
December 8, 2003
Page 5 of 7
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
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