King Billion Electronics Co., Ltd
SF23C4000
駿
億
電
子
股
½
有
限
公
司
- Table of Contents -
1
2
3
4
5
6
7
8
9
Function Description______________________________________________________________2
Features ________________________________________________________________________2
Functional block diagram __________________________________________________________3
Pin Description __________________________________________________________________3
Pad Location ____________________________________________________________________4
Absolute Maximum Rating _________________________________________________________5
AC Electrical Characteristics _______________________________________________________5
DC Electrical Characteristics _______________________________________________________6
Updated History __________________________________________________________________6
August 27, 2003
Page 1 of 6
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C4000
駿
億
電
子
股
½
有
限
公
司
1 Function Description
The SF23C4000 is a fully static, 512K x 8 bit CMOS Mask Programmable ROM. This device operates in
wide operating range. It requires no external clock for its operation and suitable for use with
microprocessor program memory, and data memory (speech, graphic, etc).
2 Features
Voltage range 2.4V ~ 5.5V
Organization
- Memory Cell Array: 512K x 8
Low Operation Current (Typical)
-
-
10µA Standby mode Current
10mA Active Read Current
Fully static operation
Three state outputs
Package bare chip, PLCC32
August 27, 2003
Page 2 of 6
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C4000
駿
億
電
子
股
½
有
限
公
司
3 Functional block diagram
X BUFFER &
DECODER
[A18..A0]
Y BUFFER &
DECODER
CONTROL
LOGIC
MEMORY
CELL
ARRAY
SENSE
AMP.
CEn
OEn
[Q7.. Q0]
4 Pin Description
A12
A15
A16
NC
VDD
A18
A17
5
6
7
8
9
2
11
12
13
4
3
2
1
32
31
30
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
Q3
Q4
Q5
Q6
A14
A13
A8
A9
A11
OE
A10
CE
Q7
29
28
27
26
25
24
23
22
21
SF23C4000-PLCC32
14
15
16
17
18
19
20
Symbol
VDD
VSS
CEn
Pin No. I/O
Description
32
P Positive power supply input pin.
16
P Gound pin.
22
I The CEn (Chip Enable) input is the device selection and power control for
internal Mask ROM array. Whenever CEn goes high, the internal Mask
ROM will enter standby (power saving) mode. Otherwise, it is in active
mode and the contents of the ROM can be accessed.
Page 3 of 6
V1.1
August 27, 2003
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C4000
駿
I
億
電
子
股
½
有
限
公
司
OEn
A18 ~ A0
Q7 ~ Q0
24
21 ~ 17,
15 ~13
OEn (Output Enable) is the output control which gates ROM array data onto
the data output pins Q7 ~ Q0.
I Mask ROM Address input pins.
O Mask ROM array Data outputs drive Q7 ~ Q0 pins during read operations
(OEn low). The Q7 ~ Q0 pins stay in high-impedance when the chip is
deselected (CEn high) or when the outputs are disabled (OEn high).
5 Pad Location
A12
A7
A15
A16
NC
VDD
VDD
VDD
A18
A17
A14
A13
A6
A5
A4
NC
A8
NC
A9
A11
NC
NC
A3
A2
A1
OEN
A0
A10
CEN
VSS
Q0
Q1
Q2
VSS
VSS
Q3
Q4
Q5
Q6
Q7
August 27, 2003
Page 4 of 6
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
King Billion Electronics Co., Ltd
SF23C4000
駿
億
電
子
股
½
有
限
公
司
Pad No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pad Name X Coord.
Y Coord.
A7
108.33
2431.75
A6
108.33
2244.31
A5
108.33
2057.03
A4
108.33
1869.59
NC
108.33
1682.36
NC
108.33
1494.92
NC
108.33
1307.74
NC
108.33
1119.34
A3
108.33
932.17
A2
108.33
744.73
A1
108.33
557.45
A0
108.33
370.01
Q0
108.33
182.72
Q1
395.97
109.14
Q2
583.13
109.14
VSS
997.39
220.71
VSS
1242.34
140.91
VSS
1521.38
108.09
Q3
1684.02
109.14
Q4
1871.18
109.14
Pad No.
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pad Name X Coord.
Y Coord.
Q5
2058.62
109.14
Q6
2245.78
109.14
Q7
2745.87
105.79
CEN
2745.87
229.55
A10
2745.87
355.17
OEN
2745.87
480.32
A11
2759.48
1365.83
A9
2759.48
1491.74
A8
2759.48
1617.63
A13
2748.87
2427.92
A14
2748.87
2555.13
A17
2107.66
2566.92
A18
1920.22
2566.92
VDD
1578.76
2513.72
VDD
1404.34
2513.72
VDD
1229.92
2513.72
NC
1029.23
2552.3
A16
841.19
2552.3
A15
495.57
2552.3
A12
308.13
2552.3
6 Absolute Maximum Rating
Items
Supply Voltage
Input Voltage
Operating Temperature
Storage Temperature
Symbol
V
DD
V
IN
T
OPR
T
STR
Rating
-0.3 to 6 V
-0.3 to Vdd+0.3 V
-0 to 70
°C
-55 to 125
°C
Condition
7 AC Electrical Characteristics
READ CYCLE
There are two ways of accessing the ROM data. The first one is to assert the valid address on the Address
Bus, then assert CEn “low” to enable the ROM array. The access time in this mode is specified as t
ACE
.
The advantage of this access mode is that power consumption can be lowered. The second access mode
keeps the CEn “low” while changes the addresses to access the contents of ROM data. The access time in
August 27, 2003
Page 5 of 6
V1.1
This specification is subject to change without notice. Please contact sales person for the latest version before use.
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