DA9276.003
13 July, 2006
MAS9276
IC for 10.00 – 30.00 MHz VCTCXO
•
•
•
•
•
•
DESCRIPTION
MAS9276 is integrated circuit well suited to build
VCTCXO for mobile communications. Temperature
calibration is achieved at three calibration
temperatures only. The trimming is done through a
serial bus and the calibration information is stored
in an internal PROM. This means that no rework
for trimming is needed.
To build a VCTCXO only a crystal is required in
addition to MAS9276. The compensation method
is fully analog, working continuously without
generating any steps or other interference.
Very High Control Voltage
Sensitivity
True Sinewave Output
Electrically Trimmable
Very Low Phase Noise
Low Power
Low Cost
FEATURES
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•
•
•
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Very small size
Minimal current consumption
Wide operating temperature range
Phase noise <-120 dBc/Hz at 100 Hz offset
Programmable Vc sensitivity
APPLICATIONS
•
•
VCTCXO for mobile phones
VCTCXO for other telecommunications
systems
BLOCK DIAGRAM
DA
CLK
PV
VC
CUB
INF
SENS
LIN
4
4
f(T)
MAS9276
TE1
4
Σ
f(T)
8
T
Vref
TMux
TE2
CDAC1
8
VDD
OUT
VSS
X2
X1
1 (8)
DA9276.003
13 July, 2006
PIN DESCRIPTION
Pin Description
Power Supply Voltage
Programming Input
Serial Bus Clock Input
Serial Bus Data Input
Temperature Output
Test Multiplexer Output
Voltage Control Input
Crystal Oscillator Output
Crystal/Varactor Oscillator Input
Power Supply Ground
Buffer Output
Symbol
VDD
PV
CLK
DA
TE1
TE2
VC
X1
X2
VSS
OUT
x-coordinate
166
420
979
1234
1488
1742
185
439
1357
1790
2046
y-coordinate
1430
1435
1441
1441
1441
1441
153
149
149
166
153
Note:
Because the substrate of the die is internally connected to GND, the die has to be connected to GND or
left floating. Please make sure that GND is the first pad to be bonded. Pick-and-place and all component
assembly are recommended to be performed in ESD protected area.
Note:
Pad coordinates are measured from the left bottom corner of the chip to the center of the pads. The
coordinates may vary depending on sawing width and location, however, distances between pads are accurate.
ABSOLUTE MAXIMUM RATINGS
(test conditions)
Parameter
Supply Voltage
Input Voltage
Power Dissipation
Storage Temperature
Note 1:
Not valid for programming pin PV
Symbol
V
DD
- V
SS
V
IN
P
MAX
T
ST
Min
-0.3
V
SS
-0.3
-55
Max
6.0
V
DD
+ 0.3
20
150
Unit
V
V
mW
o
C
Note
1)
RECOMMENDED OPERATION CONDITIONS
Parameter
Supply Voltage
Supply Current
Operating Temperature
Storage Temperature
Crystal Pulling Sensitivity
Crystal Load Capacitance
Symbol
V
DD
I
CC
T
C
T
S
S
C
L
Conditions
Vdd = 2.8 Volt
Relative humidity =
15%…70%
-30
-5
30
10
Min
2.7
Typ
2.8
Max
5.5
1.8
+85
+40
Unit
V
mA
o
C
o
C
ppm/pF
pF
Note
2 (8)
DA9276.003
13 July, 2006
ELECTRICAL CHARACTERISTICS
Parameter
Frequency Range
Voltage Control Range
Frequency vs. Supply Voltage
Frequency vs. Load Change
Voltage Control Sensitivity (VCR = 0)
Voltage Control Sensitivity (VCR = 1)
Output Voltage (10kΩ // 10 pF)
Compensation Range ± 2.5 ppm
Compensation Range ± 2.0 ppm
Compensation Range Linear Part
Compensation Inflection Point
Compensation Range Cubic Part
Compensation CDAC1 (8 Bit)
Start up Time
Symbol
f
o
V
C
df
o
df
o
V
CSENS
V
CSENS
V
out
T
C
T
C
a1
INF
a3
C
X1
T
START
C10
2
-30
-25
-0.7
25
95
C10 + 18
11
5
1.0
85
75
0.0
31
Min
10.00
0
Typ
Max
30.00
Vdd
±0.2
±0.2
25
11
ppm
ppm
ppm/V
ppm/V
Vpp
o
o
Unit
MHz
Note
1)
2)
3)
C
C
C
4)
ppm/K
o
ppm
2
/K
3
pF
ms
Note 1:
VDD within +/- 5%
Note 2:
R = 10 kohm +/- 10%, C = 10 pF +/- 10%
Note 3:
default
Note 4:
typ C10 = 13 pF
IC OUTLINES
VDD
PV
CLK
DA
TE1
TE2
MAS9276
1584 µm
VC
X1
X2
VSS
OUT
Die map reference
2204 µm
Note 1:
MAS9276 pads are round with 80 µm diameter at opening.
Note 2:
Pins CLK and DA can either be connected to VSS or left floating, pin PV can either be connected to
VDD or left floating and pin TE1 must be left floating in VCTCXO module end-user application.
Note 3:
Die map reference is the actual left bottom corner of the sawn chip.
3 (8)
DA9276.003
13 July, 2006
SAMPLES IN SB20 DIL PACKAGE
1
2
3
20
OUT
19
18
GND
17
TE2
4
MAS9276
YYWW
XXXXX.X
TE1
5
DA
6
CLK
7
PV
8
VDD
9
10
16
X2
15
14
X1
13
12
VC
11
Top marking:
YYWW = Year, Week
XXXXX.X = Lot number
DEVICE OUTLINE CONFIGURATION
MSOP10
TE2
DA
CLK
PV
VDD
OUT
VSS
X2
X1
VC
Top View
A = product version
X = voltage version
Y = year
WW= week
9276
AX
YWW
4 (8)
DA9276.003
13 July, 2006
PACKAGE (MSOP-10) OUTLINE
e
S
See Detail A
c
B
E1
E1
B
E
E
5-15 Degrees
L1
Detail A
A2
A
A1
D
L
G
Symbol
Min
Nom
Max
Unit
c1
b1
(b)
Section B - B
A
A
0 - 8 Degrees
Gauge Plane
L2
Seating Plane
F
Land
Pattern
Recommendation
N
M
A
A1
A2
b
b1
c
c1
D
E
E1
e
F
G
L
(Terminal length for
soldering)
L1
L2
M
N
S
--
0.00
0.75
0.15
0.15
0.08
0.08
--
--
0.85
--
---
1.10
0.15
0.95
0.30
0.25
0.23
0.18
0.40
3.00 BSC
4.90 BSC
3.00 BSC
0.50 BSC
4.8
0.50
0.60
0.80
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
mm
0.95 REF
0.25 BSC
0.41
1.02
0.50
mm
mm
mm
Mm
Dimensions do not include mold or interlead flash, protrusions or gate burrs.
Reference Standard : JEDEC MO-187 BA.
5 (8)
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