PLL130-05
High Speed Translator Buffer to PECL (Enable Low)
FEATURES
•
•
•
•
•
Differential PECL output
Single AC coupled input (min. 100mV swing).
Input range from DC to 1.0 GHz.
2.5V to 3.3V operation.
Available in 3x3mm QFN.
GND
GND
GND
PIN CONFIGURATION
(TOP VIEW)
GND
9
VDD
11
VDD
13
14
15
16
12
VDD
10
8
7
6
5
PECL_BAR
VDD
PECL
GND
PLL130-05
1
2
3
4
DESCRIPTION
The PLL130-05 is a low cost, high performance,
high speed, buffer that reproduces any input fre-
quency from DC to 1.3GHz. It provides one pair
of differential PECL outputs. Any input signal
with at least 100mV swing can be used as refer-
ence signal. This chip is ideal for conversion
from sine wave, TTL, CMOS, or LVDS to PECL.
OE
V
REF_IN
GND
GND
Note:
V
denotes internal pull down
BLOCK DIAGRAM
REF_IN
Input
PECL_BAR
PECL
Amplifier
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/09/04 Page 1
GND
PLL130-05
High Speed Translator Buffer to PECL (Enable Low)
PIN DESCRIPTIONS
Name
GND
VDD
REF_IN
PECL
PECL_BAR
OE
3x3mm QFN
Pin number
1,2,4,5,
9,13,14,15
7,10,11,12
3
6
8
16
Type
P
P
I
O
O
I
Ground.
Description
Power supply.
Reference input signal. The frequency of this signal will be reproduced
at the output (after translation to PECL level).
PECL True output.
PECL Complementary output.
Output enable (‘0’ for enable).
Internal pull-down (default is ‘0’).
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
SYMBOL
V
DD
V
I
V
O
T
S
T
A
T
J
MIN.
-0.5
-0.5
-65
-40
MAX.
4.6
V
DD
+0.5
V
DD
+0.5
150
85
125
260
2
UNITS
V
V
V
°C
°C
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
*
Note:
Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Specification
PARAMETERS
Input Frequency
Input signal swing
Output Frequency
Output Rise Time
Output Fall Time
CONDITIONS
REF_IN input
0.8V to 2.0V with no load
2.0V to 0.8V with no load
MIN.
0
100
0
TYP.
MAX.
1000
1000
1.5
1.5
UNITS
MHz
mV
MHz
ns
ns
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/09/04 Page 2
PLL130-05
High Speed Translator Buffer to PECL (Enable Low)
3. PECL Electrical Characteristics
PARAMETERS
Output High Voltage
Output Low Voltage
SYMBOL
V
OH
V
OL
CONDITIONS
R
L
= 50
Ω
to (V
DD
– 2V)
(see figure)
MIN.
V
DD
– 1.025
MAX.
V
DD
– 1.620
UNITS
V
V
4. PECL Switching Characteristics
PARAMETERS
Clock Rise Time
Clock Fall Time
SYMBOL
t
r
t
f
CONDITIONS
@20/80% - PECL
@80/20% - PECL
MIN.
TYP.
0.6
0.5
MAX.
1.5
1.5
UNITS
ns
ns
PECL Levels Test Circuit
OUT
VDD
OUT
PECL Output Skew
50Ω
2.0V
50%
50Ω
OUT
OUT
t
SKEW
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
80%
50%
20%
OUT
t
R
t
F
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/09/04 Page 3
PLL130-05
High Speed Translator Buffer to PECL (Enable Low)
PACKAGE INFORMATION
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL130-05 S C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRAL
PACKAGE TYPE
Q=QFN
Order Number
PLL130-05QC-R
PLL130-05QC
Marking
P130-05QC
P130-05QC
Package Option
QFN - Tape and Reel
QFN - Tube
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY:
PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/09/04 Page 4
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