SM5819AF
6-channel DSD-PCM Converter
OVERVIEW
The SM5819AF is a 6-channel DSD data (64fs) to 4fs, 2fs or fs PCM data converter. During conversion, deci-
mation filtering is performed using a filter with selectable fixed coefficients (3 sets). Also, DSD inputs and
PCM outputs are available for use in master/slave clock mode operation, in a wide range of system configura-
tions, making it easy to construct a multi-channel DSD/PCM reproduction system.
FEATURES
I
PINOUT
(Top view)
EXILRCK
EXICSW
EXIMCK
EXIBCK
EXISLR
EXIFLR
TOUT2
26
I
36
35
34
33
32
31
30
29
28
27
25
I
I
I
I
SEL1FS
SEL4FS
SELEXT
DSGAIN
XMTPCM
I
I
I
PACKAGE DIMENSIONS
(Unit: mm)
9 ± 0.4
7 ± 0.1
+ 0.075
0.125
−
0.025
I
I
7 ± 0.1
9 ± 0.4
APPLICATIONS
I
I
TEST1
TEST2
VDDH
VDDL
I
512fs (22.5792MHz, fs = 44.1kHz), 1:2 to 2:1
duty master clock
DSD input and PCM output clock master/slave
switching
3-system external data input (3-wire format),
PCM output data/BCK/LRCK external input and
internal filter output switching
(BCK and LRCK are common to all 3 external
PCM data inputs)
Decimation filter coefficients
• Fixed coefficients: 4fs-1/2fs-1/fs-1
PCM output mute operation
PCM output format: [MSB-first left-justified 32-
bit] or [IIS 32-bit]
(IIS 32-bit output bit clock frequency = 64
×
word
clock frequency)
FIR filter coefficients
• 64fs
→
4fs/2fs/fs: 480th-order (6-channel)
• ROM coefficients: 24 valid data bits (4-bit MSB
extension at 4fs, 5-bit MSB extension at 2fs/fs)
+ 6dB DSD gain switching function
External/Internal system clock output switching
3.3V (3.0 to 3.6V) and 2.5V (2.3 to 2.7V) power
supplies
−
40 to 85
°
C operating temperature range
48-pin QFP package
VDDH
VDDL
MCK
VSS
VSS
VDDL
DSBCK
DSIFL
DSIFR
DSICT
DSISW
DSISL
DSISR
DIRDSCK
SYNC
INIT
VSS
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
VSS
POFLR
POCSW
POSLR
PLRCK
PBCK
VDDH
MCKOUT
VSS
FMTPCM
DIRPCK
VDDL
TEST3
10
TOUT1
11
VSS
12
1
2
3
4
5
6
7
8
9
Multi-channel SA-CD players
SA-CD-compatible AV amplifiers
1.4 ± 0.1
ORDERING INFORMATION
Device
SM5819AF
Package
48 -pin QFP
+ 0.09
0.18
−
0.05
0.5
0.08
1.7 MAX
0 ~ 10
0.1
SEIKO NPC CORPORATION —1
0.5 ± 0.2
SM5819AF
PIN DESCRIPTION
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
Name
VDDL
SEL1FS
SEL4FS
SELEXT
DSGAIN
XMTPCM
VDDH
TEST1
TEST2
TEST3
TOUT1
VSS
VDDL
DIRPCK
FMTPCM
VSS
MCKOUT
VDDH
PBCK
PLRCK
POSLR
POCSW
POFLR
VSS
VDDL
TOUT2
MCK
VSS
EXIMCK
VDDH
EXIBCK
EXILRCK
EXISLR
EXICSW
EXIFLR
VSS
VDDL
DSBCK
I/O
−
I
I
I
I
I
−
I
I
I
O
−
−
I
I
−
O
−
I/O
I/O
O
O
O
−
−
O
I
−
I
−
I
I
I
I
I
−
−
I/O
Property
1
−
PD
PD
PD
PD
PD
−
PD
PD
PD
−
−
−
PD
PD
−
12mA
−
S, 6mA
S, 6mA
2mA
2mA
2mA
−
−
−
−
−
−
−
S
S
−
−
−
−
−
S, 6mA
Input
voltage
2.5V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
−
−
2.5V
3.3V
3.3V
−
−
3.3V
3.3V
3.3V
−
−
−
−
2.5V
−
3.3V
−
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
−
2.5V
3.3V
Core power supply
PCM output rate select 1
L: 2fs/4fs, H: fs
PCM output rate select 2
L: 2fs, H: 4fs
fs/2fs/4fs output and external data output select
L: fs/2fs/4fs data, H: external data (EXI**)
DSD signal gain setting
L: 100% modulation = 0dB, H: 50% modulation = 0dB
PCM output mute control input
L: Mute ON, H: Mute OFF
I/O power supply
Test input 1 (must be open or tie LOW for normal operation)
Test input 2 (must be open or tie LOW for normal operation)
Test input 3 (must be open or tie LOW for normal operation)
Test output 1
Ground
Core power supply
PCM output PBCK/PLRCK I/O select
L: Output (master mode), H: Input (slave mode)
PCM output format select
L: MSB-first left-justified 32-bit, H: IIS 32-bit
Ground
System clock output (selected by SELEXT)
I/O power supply
PCM output BCK bit clock
PCM output LRCK word clock
PCM data output: surround left/right-channel
PCM data output: center/subwoofer channel
PCM data output: front left/right-channel
Ground
Core power supply
Test output 2
Master clock input: 512fs (22.5792MHz, fs = 44.1kHz)
Ground
External system clock input
I/O power supply
External PCM data BCK bit clock input
External PCM data LRCK word clock input
External PCM data input: surround left/right-channel
External PCM data input: center/subwoofer channel
External PCM data input: front left/right-channel
Ground
Core power supply
DSD data input bit clock. Controlled by DIRDSCK
Description
SEIKO NPC CORPORATION —2
SM5819AF
Input
voltage
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
−
DSD data input: front left-channel
DSD data input: front right-channel
DSD data input: center channel
DSD data input: subwoofer channel
DSD data input: surround left-channel
DSD data input: surround right-channel
DSBCK I/O select
L: input (slave), H: output (master)
Forced synchronization input (active-HIGH edge)
Initialization input: Active-LOW, Resync on “L”
→
“H”
Ground
No.
39
40
41
42
43
44
45
46
47
48
Name
DSIFL
DSIFR
DSICT
DSISW
DSISL
DSISR
DIRDSCK
SYNC
INIT
VSS
I/O
I
I
I
I
I
I
I
I
I
−
Property
1
−
−
−
−
−
−
PD
S, PU
S, PU
−
Description
1. S = Schmitt, PU = pull-up resistor, PD = pull-down resistor, mA = output current
SEIKO NPC CORPORATION —3
SM5819AF
BLOCK DIAGRAM
DSIFL
DSIFR
DSICT
DSISL
DSISR
DSISW
FIR FILTER
and
DOWN SAMPLING
UNIT
PCM
MUTE
PCM
I/F
DSGAIN
SEL1FS
SEL4FS
FMTPCM
ROM
24bit 720word
(fs 240w)
(2fs 240w)
(4fs 240w)
POFLR
INT/EXT.
DATA
SELECT
POSLR
XMTPCM
POCSW
EXIFLR
EXISLR
EXICSW
SELEXT
EXILRCK
EXIBCK
EXIMCK
INT/EXT.
CLOCK
SELECT
SYNC
INIT
DIRDSCK
DSBCK
MCK
CLOCK
GENERATOR
and
TIMING
CONTROL
(Internal Clocks)
PLRCK
PBCK
MCKOUT
DIRPCK
TEST1
TEST2
TEST3
TEST
CONTROL
TOUT1
TOUT2
SEIKO NPC CORPORATION —4
SM5819AF
SPECIFICATIONS
Absolute Maximum Ratings
V
SS
= 0V
Parameter
Supply voltage 1
Supply voltage 2
Input voltage (3.3V)
Power dissipation
Storage temperature range
Symbol
V
DDH
V
DDL
V
IN
P
D
T
STG
Rating
– 0.3 to 4.0
– 0.3 to 3.0
– 0.3 to V
DDH
+ 0.5
200
– 55 to 125
Unit
V
V
V
mW
°
C
Recommended Operating Conditions
V
SS
= 0V
Parameter
Supply voltage 1
Supply voltage 2
Operating temperature
Symbol
V
DDH
V
DDL
T
OPR
Rating
3.0 to 3.6
2.3 to 2.7
– 40 to 85
Unit
V
V
°
C
DC Electrical Characteristics
V
DDH
= 3.0 to 3.6V, V
DDL
= 2.3 to 2.7V, V
SS
= 0V, T
OPR
= – 40 to 85
°
C unless otherwise noted.
Parameter
Current consumption 1
Current consumption 2
Input voltage
“H" level
“L" level
Positive
Negative
Pin
VDDH
VDDL
(*1)
(*1)
(*2)
(*2)
(*2)
"H" level
Output voltage
"L" level
Input leakage current
Pull-down resistor
Pull-up resistor
(*3)
(*1, 2)
(*4)
(*5)
V
OL
I
LI
R
PD
R
PU
V
I
= V
DDH
V
I
= V
SS
(*3)
Symbol
I
DDH
I
DDL
V
IH
V
IL
V
T+
V
T–
V
H
V
OH
I
OH
= – 2mA (Type1)
I
OH
= – 6mA (Type2)
I
OH
= – 12mA (Type3)
I
OL
= 2mA (Type1)
I
OL
= 6mA (Type2)
I
OL
= 12mA (Type3)
Condition
Rating
min
–
–
2.0
–
1.1
0.6
0.1
V
DDH
– 0.4
typ
–
–
–
–
–
–
–
–
max
5
30
–
0.8
2.4
1.8
–
–
Unit
mA
mA
V
V
V
V
V
V
All pins no load
V
DDH
= 3.6V
V
DDH
= 3.0V
Schmitt-trigger voltage
Hysteresis voltage
–
–5
60
60
–
–
120
120
0.4
5
288
288
V
µ
A
k
Ω
k
Ω
Pin summary
(*1)
(*2)
Input pins and bidirectional (input/output) pins in input mode
Inputs with Schmitt characteristic and bidirectional (input/output) pins in input mode
Output pins and bidirectional (input/output) pins in output mode
Type 3: MCKOUT
Type 2: DSBCK, PBCK, PLRCK
Type 1: Outputs excluding those above
Inputs with pull-down resistor
Inputs with pull-up resistor
(*3)
(*4)
(*5)
SEIKO NPC CORPORATION —5
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