AS3525-A/-B C22O22
Data Sheet, Confidential
å
Datasheet, Confidential
AS3525
Advanced Audio Processor System
1
Description
2
2.1
Key Features
Digital Core
This highly flexible and fully integrated audio processor system
(AS3525) combines strong calculating power, high performance
audio features with system power management options for battery
powered devices.
Using advanced 0.13µm process technology and large on chip
RAM leads to outstanding low power consumption of as low as
58mW for a complete flash-player during MP3 playback.
Based on a powerful ARM9TDMI capable of performing up to
200MIPS it is suited to run MP3, AAC, WMA, OGG… decoders and
encoders and, in addition, it can perform extensive user interfaces,
motion graphics support, video playback and much more.
The AS3525 SOC (system-on-a-Chip) features dedicated high
speed interfaces for ATA IDE, USB2.0 HS-OTG and SDRAM
ensuring maximum performance for download, upload, and
playback.
Furthermore interfaces for NAND flashes, MMC/SD cards and
Memory Stick ensure most flexible system design possibilities.
Hardware support for parallel interfaces lower the CPU load serving
complex and/or colour user interfaces.
Additional serial high-speed data and control interfaces guarantee
the connection to other peripherals and or processors in the system.
Two independently programmable PLLs generate the required
frequencies for audio playback/recording, for the processor core
and for the USB interface at the same time. An additional external
clock input eliminates the use of external crystals when used in
multi-processor systems like mobile phones.
It has a variety of audio inputs and outputs to directly connect
electret microphones, and auxiliary signal sources via a 10-channel
mixer to a 16Ω/32Ω headset , 4Ω speaker or auxiliary audio
peripherals.
Further the device offers advanced power management functions.
All necessary ICs and peripherals in a Digital Audio Player with
flash or hard-disk memory are supplied by the AS3525. The
different regulated supply voltages are fully programmable. The
power management block generates 10 different supply voltages
out of a single battery supply. CPU, NAND flash, SRAM, memory
cards, LCD, LCD backlight and USB-OTG can be powered. When
operating from a single cell (AA or AAA) battery the AS3525 can
use a DCDC booster to generate the needed system supply.
The AS3525 has an independent 32kHz real time clock (RTC) on
chip, which allows a complete power down of the system CPU and
peripherals.
AS3525 also contains a charger for Li-Io battery supply
The single supply voltage may vary from 1.0V to 5.5V.
Embedded 32-Bit RISC Controller
•
ARM922TDMI RISC CPU
•
2.5Mbit on-chip RAM
•
1Mbit on chip ROM
•
Clock speed max. 250MHz (200MIPS)
•
Standard JTAG interface
USB 2.0 HS & OTG Interface
•
Up to 480Mbit/s transfer speed
•
USB 2.0 HS/FS physical inlcuding OTG support
•
USB 2.0 HS/FS digital core including OTG host
•
Dedicated dual port buffer RAM
•
DMA bus master functionality
IDE Host Controller
•
Supporting Ultra ATA 33/66/100/133 modes
•
Programmable IO and Multi-word DMA capability
•
Dedicated dual port buffer RAM
•
DMA bus master functionality
External Memory Controller
•
Dynamic memory interface
•
Asynchronous static memory
•
DMA bus master functionality
DMA Controller
•
Single Master DMA controller
•
2 DMA channels possible at the same time
•
16 DMA requests supported
Interrupt Controller
•
Support for 32 standard interrupts
•
Support for 16 vectored IRQ interrupts
Audio Subsystem Interface
•
Dedicated 2 wire serial control master
•
I2S input and output with dual port buffer RAM
Nand Flash Interface
•
8 and 16bit flash support
•
3, 4 & 5 byte address support
•
hardware ECC
MMC/SD Interface
•
•
MMC/SD Card host for multiple card support
4 data line support for SD cards
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Revision 1.13
1
-
194
AS3525-A/-B C22O22
Data Sheet, Confidential
2.3
MS / MS Pro Interface
•
Dedicated dual port buffer RAM
Display Interface
•
Serial and parallel controller supported
•
On chip hardware acceleration
Synchronous Serial Interface
•
Master and slave operation
•
8 and 16 bit support
•
Several protocol standards supported
I2S Interface
•
Input multiplexed with audio subsystem
•
selectable SPDIF input conversion
•
Dedicated dual port buffer RAM
2 Wire Serial Control Interface
•
Master and slave operation
•
Standard and fast mode support
General Purpose IO Interface
•
4x 8-bit ports
Power Management
Voltage Generation
•
step up for system supply (3.0V-3.6V, 150mA)
•
charge-pump for CPUcore (1.05V-1.2V, 50mA)
•
charge pump for USB OTG (5V, 10mA)
•
LDO for digital supply (2.9V, 200mA)
•
LDO for analog supply (2.9V, 200mA)
•
LDO for IO supply (2.94 or 3.11V, 200mA)
•
LDO for peripherals (1.7V-3.3V, 200mA)
•
LDO for USB Transceiver (3.26V, 200mA)
•
LDO for RTC (1.0V-2.5V, 2mA)
15V Back-light step up converter
•
for driving up to 6 white LEDs in series to achieve a
uniform illumination
•
current programmable up to 40mA (1.25mA steps)
Li-Io Battery Charger
•
•
•
automatic 50mA trickle charging
prog. constant current charging (50 – 400mA)
prog. constant voltage charging (3.9 - 4.25V)
2.4
RTC
System
2.2
Audio
Multi-bit Sigma Delta Converters
•
DAC: 18bit with 94dB SNR (‘A’ weighted)
•
ADC: 14bit with 82dB SNR (‘A’ weighted)
•
Sampling Frequency: 8-48kHz
•
32 gain steps @ 1.5dB and MUTE
2 Line Inputs
•
stereo, 2x mono or mono differential inputs
•
32 gain steps @ 1.5dB and MUTE
2 Microphone Inputs
•
differential inputs
•
3 gain pre-sets (28/34/40 dB) and OFF with AGC
•
32 gain steps @ 1.5dB and MUTE
•
microphone detection with about 50uA
•
supply for electret microphone max 1mA
•
remote control by switch
Line Output
•
max 1Vp @ 10kΩ in single ended stereo mode
•
>32Ω in mono differential mode to drive ear-pieces
•
32 gain steps @ 1.5dB and MUTE
Stereo Headphone Audio Amplifier
•
2x 60mW @ 16Ω driver capacity
•
32 gain steps @ 1.5dB and MUTE
•
Click- and pop-less start-up and power down
•
Headphone and over-current detection
•
Phantom ground eliminates large capacitors
Stereo Speaker Audio Amplifier
•
2x 500mW @ 4Ω driver capacity
•
32 gain steps @ 1.5dB and MUTE
•
Click- and pop-less start-up and power down
•
Over-current detection
10 Channel Audio Mixer
•
•
•
mixes Line inputs, Mic inputs and DAC output
separate selectable source for right and left channel
possibility to select AGC to prevent clipping
•
ultra low power 32kHz oscillator
•
32bit RTC second counter
•
selectable alarm (seconds or minutes)
•
trim able oscillator
Oscillator
•
low power 12-24MHz Oscillator
•
generating main system clock
Supervisor
•
automatic battery monitoring with interrupt generation
and selectable warning level
•
automatic temperature supervision with interrupt
generation and selectable warning and shutdown
levels
General Purpose ADC
•
10bit resolution
•
16 inputs analog multiplexer
UID
•
Unique Identification Number in OTP ROM for DRM
support
General
•
Reset pin, watchdog
•
10sec emergency shut-down
•
Wide battery supply range 1V – 5.5V
•
MP3 playback with 58mW
Packages:
•
•
AS3525-A: CTBGA224 13x13mm, 0.8mm pitch
AS3525-B: CTBGA144 10x10mm, 0.8mm pitch
3
•
•
•
•
Application
Portable Digital Audio Player and Recorder
Portable Digital Media Player
PDA
Smartphone
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Revision 1.13
2
-
194
AS3525-A/-B C22O22
Data Sheet, Confidential
4
Figure 1
Block Diagram
AS3525 Block Diagram
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Revision 1.13
3
-
194
AS3525-A/-B C22O22
Data Sheet, Confidential
Table of Contents
1
2
2.1
2.2
2.3
2.4
DESCRIPTION
KEY FEATURES
Digital Core
Audio
Power Management
System
1
1
1
2
2
2
3
4
5
5.1
5.2
APPLICATION
BLOCK DIAGRAM
TYPICAL APPLICATIONS
Flash-Player
Hard-Disk-Player
2
3
9
9
10
6
6.1
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
11
11
12
12
12
13
14
14
15
6.2 Operating Conditions
6.2.1
Supply Voltages
6.2.2
Internal Supply Voltages
6.2.3
Power Management Output Voltages
6.2.4
Operating Currents
6.2.5
Temperature Range
6.2.6
Audio Specification
7
DETAILED FUNCTIONAL DESCRIPTIONS
17
17
17
18
19
19
21
22
24
24
25
25
27
29
7.1 ARM922-T Processor Core
7.1.1
General
7.1.2
Block Diagrams
7.1.3
ARM922T Details
7.1.4
ARM V4T Architecture
7.1.5
JTAG Interface
7.1.6
Boot Concept
7.2 AHB Peripheral Blocks
7.2.1
2.5 MBIT RAM Main Memory
7.2.2
On-Chip ROM
7.2.3
VIC – Vectored Interrupt Controller
7.2.4
SMDMAC - Single master DMAC
7.2.5
Multi Port Memory Controller (MPMC)
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Revision 1.13
4
-
194
AS3525-A/-B C22O22
Data Sheet, Confidential
7.2.6
7.2.7
7.2.8
IDE Interface
USB 2.0 HS OTG interface
Memory Stick / Memory Stick Pro Interface
30
33
38
40
40
44
47
49
56
57
58
59
65
66
72
83
93
100
114
119
119
121
123
126
129
131
134
138
141
143
147
148
150
151
152
154
156
157
162
164
167
168
7.3 APB Peripheral Block
7.3.1
Timers
7.3.2
Watchdog Unit
7.3.3
SSP – Synchronous Serial Port
7.3.4
GPIO - General purpose input/output ports
7.3.5
MCI – SD / MMC Card Interface
7.3.6
I2cAudMas - I2C audio master interface
7.3.7
I2CMSI - I2C master/slave interface
7.3.8
I2SIN - I2S input interface
7.3.9
SPDIF interface
7.3.10
I2SOUT - I2S output interface
7.3.11
NAND Flash Interface
7.3.12
DBOP - Data Block Output Port
7.3.13
UART – Universal Asynchronous Receiver/Transmitter
7.3.14
CGU - Clock generation unit
7.3.15
CCU - Chip Control Unit
7.4 Audio and Power Management functions
7.4.1
SYSTEM
7.4.2
3V Step-Up Converter
7.4.3
Low Drop Out Regulators
7.4.4
Charge-Pump Step-Down Converter
7.4.5
Audio Line Output
7.4.6
Headphone Output
7.4.7
Speaker Output
7.4.8
Microphone Inputs (2x)
7.4.9
Audio Line Inputs (2x)
7.4.10
I2S Digital Audio Interface
7.4.11
Audio Output Mixer
7.4.12
Audio Settings
7.4.13
VBUS CP & Comparator
7.4.14
Auxiliary Oscillator
7.4.15
Charger
7.4.16
15V Step-Up Converter
7.4.17
Supervisor
7.4.18
Interrupt Generation
7.4.19
Real Time Clock
7.4.20
10-Bit ADC
7.4.21
128 bit OTP ROM
7.4.22
2-Wire-Serial Control Interface
8
8.1
PINOUT AND PACKAGING
Package Variants
172
172
172
172
173
173
182
182
183
8.2 CTBGA224 Package Drawings
8.2.1
Marking
8.2.2
CTBGA224 Package Ball-out
8.2.3
CTBGA224 Ball List
8.3 CTBGA144 Package Drawings
8.3.1
CTBGA144 Package Ball-out
8.3.2
CTBGA144 Ball List
© 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Revision 1.13
5
-
194
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
