Displays
ANDpSi089C362S-KIT
8.90” WSVGA Color p-Si TFT
LCD Module
The ANDpSi089C362S is 1024 x 600 Color TFT display that
utilizes new poly-silicon (p-Si) technology to provide a brighter,
thinner and lighter display with high-resolution. The p-Si TFT
technology allows the row and column LCD drivers to be
fabricated directly on the LCD glass. This eliminates the need for
discrete TAB drivers and also reduces the thickness, weight and
overall size of the display.
The 8.90” WSVGA resolution
expands applications in mini-notebook PC’s.
Features
•
•
•
•
•
•
•
• RoHS Compliant
High Luminance
Single CCFL, Sidelight type
Replaceable structure of lamp units
LVDS interface system
Slim (5.2mmMAX)
WSVGA (1024 x 600 pixels color display)
Applications: 8.9” wide display size for notebook PC
Electrical Characteristics (Ta = 25°C)
Item
Supply Voltage
I
FL
=3.0mA(rms)
FL Start Voltage
(Ta = 0°C)
Differential Input
Voltage
Symbol
(V
DD
)
(V
FL
)
–
(V
ID
)
(V
CM
)
*1(I
DD
)
*2(I
FL
)
–
Min.
3.0
450
1300
100
1.0
–
3.0
–
Typ.
3.3
500
–
–
_
180
5.5
3.4
Max.
3.6
550
–
500
2.4 -
V
ID
/2
250
6.0
–
Unit
V
V(rms)
V(rms)
mV
V
mA
mA(rms)
W
Mechanical Characteristics
Item
Dimensional
Outline (Typ.)
Number of
Pixels
Active Area
Pixel Pitch
Weight (approx.)
Backlight
Specification
224.0(W) x 129.0 (H) x 5.2 max(D)
1024(W) x 600(H)
195.07 (W) x 113.40 (H)
0.1905 (W) x 0.1890 (H)
160
Single CCFL, Sidelight type
Unit
mm
pixels
mm
mm
gram
–
Common Mode
Input Voltage
Current
Consumption
*1 *2 Power
Consumption
I
FL
=5.5mA(rms)
*1) 8 color bars pattern
*2) Excepting the efficiency FL inverter
Absolute Maximum Ratings
Item
Supply Voltage
FL Driving Frequency
Input Signal Voltage
Operating Temperature
Storage Temperature
Storage Humidity
V
DD
V
FL
f
FL
V
IN
Min.
-0.3
–
–
-0.3
0
-20
10
Max.
+4.0
2.0
100
V
DD
+
0.3
50
60
90
Unit
V
kV(rms)
kHz
%(RH)
ºC
ºC
%(RH)
Optical Characteristics (Ta = 25°C)
Item
Contrast Ratio (CR)
Response Time
Luminance (L)
I
FL
=3.0mA(rms)
(t
ON
)
(t
OFF
)
Min.
100
–
–
175
Typ.
–
–
–
250
Max.
–
50
50
–
Unit
–
ms
ms
cd/m
2
Product specifications contained herein may be changed without prior notice.
It is therefore advisable to contact Purdy Electronics before proceeding with the design of equipment incorporating this product.
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8216 • Fax: 408.733.1287 • sales@purdyelectronics.com
2/25/09
1
www.purdyelectronics.com
Displays
Dimensional Outline
Front View
ANDpSi0089C362S-KIT
Unit: mm
Standard Tolerance: 0.5mm
2
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8216 • Fax: 408.733.1287 • sales@purdyelectronics.com
2/25/09
www.purdyelectronics.com
Displays
Dimensional Outline
Back View
ANDpSi0089C362S-KIT
Unit: mm
Standard Tolerance: 0.5mm
2/25/09
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8216 • Fax: 408.733.1287 • salesl@purdyelectronics.com
3
www.purdyelectronics.com
Displays
Timing Specifications
(see Notes below)
Signal
Frame Period
NCLK
Frequency
high Time
Low Time
HSYNC
Setup to NCLK
Pulse Width
Pulse Width
VSYNC
VSYNC to DATA
Setup to HSYNC
–
Line Period
Horizontal Display Time
Frame Frequency
–
Frame Period
Vertical Display Time
DATA
Setup
Hold
Setup
DE
Hold
Display Start
Item
Symbol
Min
19.0
–
6
7
7
8 x
ts
3 x
tlpd
7 x
tlpd
16
1320 x
ts
25.08
1024 x
ts
56
610 x
tlpd
600 x
tlpd
5
7
10
10
–
ANDpSi0089C362S-KIT
Typ
19.84
50.4
–
–
–
–
–
–
–
1344 x
ts
26.67
1024 x
ts
60
625 x
tlpd
600 x
tlpd
–
–
–
–
–
Max
–
52.6
–
–
–
–
7 x
tlpd
–
–
1344 x
ts
1024 x
ts
–
635 x
tlpd
600 x
tlpd
–
–
–
–
400 x
ts
Unit
ns
MHz
ns
ns
ns
–
–
–
ns
–
µ
s
–
Hz
–
–
ns
ns
ns
ns
–
ts
1/ts
tsh
tsl
tls
tlw
tfw
tfd
tfl
tlpd=tlpl
thd
1/tfpd
tfpd=tfpf
tvd
tds
tdh
tdrs
tdrh
tdrds
Notes:
Refer to “Timing Chart” below. If NCLK is fixed to “H” or “L” level for certain period while VDD is supplied, the panel may be damaged. Please adjust
LCD operating signal timing and FL driving frequency, to optimized the display quality. There is a possibility that flicker is observed by the interference
of LCD operating signal firing and FL driving condition (especially driving frequency), even if the condition satisfied above timing specifications. Do
not make tv, tvhd and tvds fluctuate. If tv, tvhd, and tvds are fluctuating, the panel displays black. In case of using the long frame period, the deteriora-
tion of display quality, noise, etc., may be occurring. NCLK count of each Horizontal Scanning Time should always be the same. V-Blanking period
should be “
n
” X “Horizontal Scanning Time”. (
n
:integer) Frame period should always be the same.
Timing Chart
4
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8216 • Fax: 408.733.1287 • sales@purdyelectronics.com
2/25/09
www.purdyelectronics.com
Displays
CN1 Input Signal
ANDpSi0089C362S-KIT
Connector Pin Assignment for Interface
Connector: DF19L-14P-1H / Hirose
Matching Connector: DF19G-14S-1C / Hirose
Terminal
Symbol
No.
1
2
3
4
5
6
7
V
DD
V
DD
GND
GND
RxIN0-
RxIN0+
RxIN1-
Function
Power Supply Voltage; +3.3V
Power Supply Voltage; +3.3V
GND
GND
Negative LVDS differential clock input
(R0-R5, G0)
Positive LVDS differential clock input
(R0-R5, G0)
Negative LVDS differential clock input
(G1-G5, B0-B1)
Block Diagram
8
Positive LVDS differential clock input
RxIN1+
(G1-G5, B0-B1)
Negative LVDS differential clock input
(B2-B5, HS, VS, DE)
Positive LVDS differential clock input
(B2-B5, HS, VS, DE)
Clock Signal (-)
Clock Signal (+)
GND
GND
9
10
11
12
13
14
RxIN2-
RxIN2+
CLK-
CLK+
GND
GND
Note: Please connect GND pin to ground. Don’t use it as no-con-
nect nor connection with high impedance.
CN2 CCFL Power Source
Connector: BHSR-02VS-1 / Japan Solderless Terminal
Mfg. Co., Ltd.
Matching Connector: SM02B-BHSS-1 / Japan Solderless
Terminal Mfg, Co., Ltd.
Terminal
No.
1
2
Symbol
V
FLH
V
FLL
Function
CCFL Power Supply (High Voltage)
CCFL Power Supply (Low Voltage)
2/25/09
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085
Tel: 408.523.8216 • Fax: 408.733.1287 • salesl@purdyelectronics.com
5
www.purdyelectronics.com
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