0LFURFRPSXWHU &RPSRQHQWV
%LW &026 6LQJOH&KLS 0LFURFRQWUROOHU
&5,
Data Sheet 1998-05 Preliminary
e/
d
s.
en r/
em cto
i
.s du
ww con
//w mi
:
tp Se
ht
C161RI
Revision History:
Previous Releases:
Page
5
32
33, 35
39
Subjects
1998-05 Preliminary
1998-01 Advance Information
1997-12 Advance Information
XTAL pin numbers (MQFP) corrected.
V
DDMIN
corrected, special threshold parameters added (V
ILS
, V
IHS
, HYS,).
Specification of I
IDO
improved.
ADCTC value in converter timing example timing corrected.
Edition 1998-05
Published by Siemens AG, Bereich Halbleiter, Marketing-Kommunikation
Balanstraße 73, D-81541 München.
© Siemens AG 1998. All Rights Reserved.
As far as patents or other rights of third parties are concerned, liability is only assumed for
components per se, not for applications, processes and circuits implemented within components or
assemblies.
The information describes the type of component and shall not be considered as assured
characteristics.
Terms of delivery and rights to change design reserved.
For questions on technology, delivery and prices please contact the Offices of Siemens
Aktiengesellschaft in Germany or the Siemens Companies and Representatives worldwide.
Due to technical requirements components may contain dangerous substances. For information on
the type in question please contact your nearest Siemens Office, Components Group.
Siemens AG is an approved CECC manufacturer.
C166-Family of
High-Performance CMOS 16-Bit Microcontrollers
Preliminary
C161RI 16-Bit Microcontroller
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
q
C161RI
q
q
High Performance 16-bit CPU with 4-Stage Pipeline
125 ns Instruction Cycle Time at 16 MHz CPU Clock
625 ns Multiplication (16
×
16 bits), 1.25
µs
Division (32 / 16 bit)
Enhanced Boolean Bit Manipulation Facilities
Additional Instructions to Support HLL and Operating Systems
Register-Based Design with Multiple Variable Register Banks
Single-Cycle Context Switching Support
Clock Generation via Prescaler or via Direct Clock Input
Up to 8 MBytes Linear Address Space for Code and Data
1 KByte On-Chip Internal RAM (IRAM)
2 KBytes On-Chip Extension RAM (XRAM)
Programmable External Bus Characteristics for Different Address Ranges
8-Bit or 16-Bit External Data Bus
Multiplexed or Demultiplexed External Address/Data Bus
5 Programmable Chip-Select Signals
1024 Bytes On-Chip Special Function Register Area
8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event
Controller (PEC)
16-Priority-Level Interrupt System, 11 External Interrupts
4-Channel 8-bit A/D Converter, conversion time down to 7.625 µs
2 Multi-Functional General Purpose Timer Units with five 16-bit Timers
Synchronous/Asynchronous Serial Channel (USART)
High-Speed Synchronous Serial Channel
I
2
C Bus Interface (10-bit Addressing, 400 KHz) with 2 Channels (multiplexed)
Up to 76 General Purpose I/O Lines
Programmable Watchdog Timer
On-Chip Real Time Clock
Idle and Power Down Modes with Flexible Power Management
Ambient temperature range -40 to 85 °C
Supported by a Large Range of Development Tools like C-Compilers, Macro-Assembler
Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer
Disassemblers, Programming Boards
On-Chip Bootstraploader
100-Pin MQFP / TQFP Package
This document describes the
SAB-C161RI-LM,
the
SAB-C161RI-LF,
the
SAF-C161RI-LM
and the
SAB-C161RI-LF.
For simplicity all versions are referred to by the term
C161RI
throughout this document.
1
1998-05
26May98@13:18h Intermediate Version
C161RI
Introduction
The C161RI is a new derivative of the Siemens C166 Family of 16-bit single-chip CMOS
microcontrollers. It combines high CPU performance (up to 8 million instructions per second) with
high peripheral functionality and enhanced IO-capabilities. The C161RI derivative is especially
suited for cost sensitive applications.
V
DD
V
SS
V
AREF
V
AGND
XTAL1
XTAL2
RSTIN
RSTOUT
NMI
EA
ALE
RD
WR/WRL
Port 5
6 bit
PORT0
16 bit
PORT1
16 bit
Port 2
8 bit
C161RI
Port 3
15 bit
Port 4
7 bit
Port 6
8 bit
Figure 1
Logic Symbol
Ordering Information
The ordering code for Siemens microcontrollers provides an exact reference to the required
product. This ordering code identifies:
the derivative itself, ie. its function set
the specified temperature range
the package
the type of delivery.
For the available ordering codes for the C161RI please refer to the
„Product
Information Microcontrollers“,
which summarizes all available microcontroller variants.
q
q
q
q
Note:
The ordering codes for the Mask-ROM versions are defined for each product after
verification of the respective ROM code.
Semiconductor Group
2
1998-05
26May98@13:18h Intermediate Version
C161RI
Pin Configuration MQFP Package
(top view)
Figure 2
Semiconductor Group
P4.5/A21
P4.6/A22
RD
WR/WRL
READY
ALE
EA
V
SS
V
DD
P0L.0/AD0
P0L.1/AD1
P0L.2/AD2
P0L.3/AD3
P0L.4/AD4
P0L.5/AD5
P0L.6/AD6
P0L.7/AD7
V
SS
V
DD
P0H.0/AD8
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
P5.2/AN2
P5.3/AN3
P5.14/T4EUD
P5.15/T2EUD
V
SS
XTAL1
XTAL2
V
DD
P3.0/SCL0
P3.1/SDA0
P3.2/CAPIN
P3.3/T3OUT
P3.4/T3EUD
P3.5/T4IN
P3.6/T3IN
P3.7/T2IN
P3.8/MRST
P3.9/MTSR
P3.10/TxD0
P3.11/RxD0
P3.12/BHE/WRH
P3.13/SCLK
P3.15/CLKOUT
V
SS
V
DD
P4.0/A16
P4.1/A17
P4.2/A18
P4.3/A19
P4.4/A20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
P5.1/AN1
P5.0/AN0
V
AGND
V
AREF
P2.15/EX7IN
P2.14/EX6IN
P2.13/EX5IN
P2.12/EX4IN
P2.11/EX3IN
P2.10/EX2IN
P2.9/EX1IN
P2.8/EX0IN
P6.7/SDA2
P6.6/SCL1
P6.5/SDA1
P6.4/CS4
P6.3/CS3
P6.2/CS2
P6.1/CS1
P6.0/CS0
C161RI
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
NMI
RSTOUT
RSTIN
V
DD
V
SS
P1H.7/A15
P1H.6/A14
P1H.5/A13
P1H.4/A12
P1H.3/A11
P1H.2/A10
P1H.1/A9
P1H.0/A8
V
DD
V
SS
P1L.7/A7
P1L.6/A6
P1L.5/A5
P1L.4/A4
P1L.3/A3
P1L.2/A2
P1L.1/A1
P1L.0/A0
P0H.7/AD15
P0H.6/AD14
P0H.5/AD13
P0H.4/AD12
P0H.3/AD11
P0H.2/AD10
P0H.1/AD9
3
1998-05
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
