CMOS Static RAM
16K (4K x 4-Bit)
Features
High-speed (equal access and cycle time)
– Military: 25/45ns (max.)
– Industrial: 25ns (max.)
– Commercial: 15/20/25ns (max.)
Low power consumption
Battery backup operation—2V data retention voltage
(IDT6168LA only)
Available in high-density 20-pin ceramic or plastic DIP and
20-pin leadless chip carrier (LCC)
Produced with advanced CMOS high-performance
technology
CMOS process virtually eliminates alpha particle
soft-error rates
Bidirectional data input and output
Military product compliant to MIL-STD-883, Class B
IDT6168SA
IDT6168LA
x
x
x
x
x
x
x
x
Description
The IDT6168 is a 16,384-bit high-speed static RAM organized
as 4K x 4. It is fabricated using lDT’s high-performance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective approach for
high-speed memory applications.
Access times as fast 15ns are available. The circuit also offers a
reduced power standby mode. When
CS
goes HIGH, the circuit will
automatically go to, and remain in, a standby mode as long as
CS
remains
HIGH. This capability provides significant system-level power and cooling
savings. The low-power (LA) version also offers a battery backup data
retention capability where the circuit typically consumes only 1µW
operating off a 2V battery. All inputs and outputs of the IDT6168 are
TTL-compatible and operate from a single 5V supply.
The IDT6168 is packaged in either a space saving 20-pin, 300-mil
ceramic or plastic DIP or a 20-pin LCC providing high board-level
packing densities.
Military grade product is manufactured in compliance with the
latest revision of MIL-STD-883, Class B, making it ideally suited to
military temperature applications demanding the highest level of
performance and reliability.
Functional Block Diagram
A
0
V
CC
GND
ADDRESS
DECODER
A
11
16,384-BIT
MEMORY ARRAY
I/O
0
I/O
1
I/O
2
I/O
3
I/O CONTROL
INPUT
DATA
CONTROL
,
CS
WE
3090 drw 01
FEBRUARY 2001
1
©2000 Integrated Device Technology, Inc.
DSC-3090/05
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
Pin Configurations
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
CS
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
Truth Table
(1)
Mode
CS
H
L
L
WE
X
H
L
Output
High-Z
D
OUT
D
IN
Power
Standby
Active
Active
3090 tbl 03
V
CC
A
11
A
10
A
9
A
8
I/O
3
I/O
2
I/O
1
I/O
0
WE
3090 drw 02
Standby
Read
Write
P20-1
D20-1
L20-1
17
16
15
14
13
12
11
NOTE:
1. H = V
IH
, L = V
IL
, X = Don't Care
Absolute Maximum Ratings
(1)
Symbol
Rating
Terminal Voltage
with Respect
to GND
Operating
Temperature
Temperature
Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Com'l.
-0.5 to +7.0
Mil.
-0.5 to +7.0
Unit
V
,
V
TERM
DIP/LCC
Top View
T
A
T
BIAS
T
STG
P
T
0 to +70
-55 to +125
-55 to +125
1.0
50
-55 to +125
-65 to +135
-65 to +150
1.0
50
o
C
C
C
o
o
W
mA
3090 tbl 04
Pin Descriptions
Name
A
0
- A
11
CS
WE
I/O
0
- I/O
3
V
CC
GND
Description
Address Inputs
Chip Select
Write Enable
Data Input/Output
Power
Ground
3090 tbl 01
I
OUT
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect reliability.
Recommended DC Operating
Conditions
Symbol
V
CC
GND
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
-0.5
(1)
Typ.
5.0
0
____
Max.
5.5
0
6.0
0.8
Unit
V
V
V
V
3090 tbl 05
Capacitance
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
7
7
Unit
pF
pF
3090 tbl 02
V
IH
V
IL
____
NOTE:
1. V
IL
(min.) = –3.0V for pulse width less than 20ns, once per cycle.
NOTE:
1. This parameter is determined by device characterization, but is not production
tested.
Recommended Operating
Temperature and Supply Voltage
Grade
Military
Industrial
Commercial
Temperature
-55
O
C to +125
O
C
-45
O
C to +85
O
C
0
O
C to +70
O
C
GND
0V
0V
0V
Vcc
5V ± 10%
5V ± 10%
5V ± 10%
3090 tbl 06
2
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
DC Electrical Characteristics
(1)
(V
CC
= 5.0V ± 10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V)
6168SA15
Power
Symbol
I
CC1
Parameter
Operating Power Supply Current
CS
< V
IL
, Outputs Open
V
CC
= Max., f
=
0
(2)
Dynamic Operating Current
CS
< V
IL
, Outputs Open
V
CC
= Max., f = f
MAX
(2)
Standby Power Supply Current
(TTL Level)
CS
> V
IH
, Outputs Open
V
CC
= Max., f = f
MAX
(2)
Full Standby Power Supply
Current (CMOS Level)
CS
> V
HC
, V
CC
= Max.,
V
IN
< V
LC
or V
IN
> V
HC
, f = 0
(2)
SA
LA
SA
LA
SA
LA
SA
LA
110
____
____
6168SA20
6168LA20
Com'l.
90
70
120
100
45
30
20
0.5
Mil.
____
6168SA25
6168LA25
Com'l.
& Ind.
90
70
110
90
35
25
3
0.5
Mil.
100
80
120
100
45
30
10
0.3
6168SA45
6168LA45
Com'l.
____
Com'l.
Mil.
Mil.
Unit
100
80
110
80
35
25
10
0.3
3090 tbl 07
mA
____
____
____
I
CC2
145
____
____
____
____
mA
____
____
____
I
SB
55
____
____
____
____
mA
____
____
____
I
SB1
20
____
____
____
____
mA
____
____
____
NOTES:
1. All values are maximum guaranteed values.
2. f
MAX
= 1/t
RC
, only address inputs are cycling at f
MAX
. f = 0 means no address inputs are changing.
DC Electrical Characteristics
V
CC
= 5.0V ± 10%
Symbol
|I
LI
|
|I
LO
|
V
OL
IDT6168SA
Parameter
Input Leakage Current
Output Leakage Current
Output LOW Voltage
Test Conditions
V
CC
= Max.,
V
IN =
GND to V
CC
V
CC
= Max.,
CS
= V
IH
,
V
OUT
= GND to V
CC
I
OL
= 10mA, V
CC
= Min.
I
OL
= 8mA, V
CC
= Min.
V
OH
Output HIGH Voltage
I
OH
= -4mA, V
CC
= Min.
MIL.
COM'L.
MIL.
COM'L.
Min.
____
____
IDT6168LA
Min.
____
____
Max.
10
2
10
2
0.5
0.4
____
Max.
5
2
5
2
0.5
0.4
____
Unit
µA
µA
V
____
____
____
____
____
____
____
____
2.4
2.4
V
3090 tbl 09
6.42
3
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
Data Retention Characteristics
V
LC
= 0.2V, V
HC
= V
CC
0.2V
Symbol
V
DR
I
CCDR
Parameter
V
CC
for Data Retention
Data Retention Current
(LA Version Only)
IDT6168LA
Test Condition
Min.
2.0
MIL.
____
____
Typ.
(1)
____
Max.
____
Unit
V
µA
µA
ns
ns
3090 tbl 10
CS
> V
HC
V
IN
> V
HC
or < V
LC
t
CDR
(5)
t
R
(5)
Chip Deselect to Data
Retention Time
Operation Recovery Time
0.5
(2)
1.0
(3)
0.5
(2)
1.0
(3)
____
100
(2)
150
(3)
20
(2)
30
(3)
____
COM'L.
____
____
0
t
RC
(4)
____
____
NOTES:
1. T
A
= +25°C.
2. at V
CC
= 2V
3. at V
CC
= 3V
4. t
RC
= Read Cycle Time.
5. This parameter is guaranteed by device characterization, but is not production tested.
Low V
CC
Data Retention Waveform
V
CC
t
CDR
CS
V
IH
4.5V
DATA
RETENTION
MODE
4.5V
V
DR
≥
2V
V
DR
V
IH
3090 drw 03
t
R
,
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
3090 tbl 11
5V
480Ω
DATA
OUT
255Ω
30pF*
DATA
OUT
255Ω
5V
480Ω
5pF*
3090 drw 04
3090 drw 05
Figure 1. AC Test Load
*Includes scope and jig capacitances
Figure 2. AC Test Load
(for t
CHZ
, t
CLZ
, t
WHZ
and t
OW
)
4
IDT6168SA/LA
CMOS Static RAM 16K (4K x 4-Bit)
Military, Industrial, and Co mmercial Temperature Ranges
AC Electrical Characteristics
(V
CC
= 5.0V ± 10%, All Temperature Ranges)
6168SA15
(1)
Min.
Max.
6168SA20
(1)
6168LA20
(1)
Min.
Max.
6168SA25
6168LA25
Min.
Max.
6168SA45
(2)
6168LA45
(2)
Min.
Max.
Unit
Symbol
Parameter
Read Cycle
t
RC
t
AA
t
ACS
t
CLZ
(3)
t
CHZ
(3)
t
OH
t
PU
(3)
t
PD
(3)
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Desele ct to Output in High-Z
Output Hold from Address Change
Chip Select to Power Up Time
Chip Deselect to Power Down Time
15
____
____
20
____
____
25
____
____
45
____
____
ns
ns
ns
ns
ns
ns
ns
ns
3090 tbl 12
15
15
____
20
20
____
25
25
____
45
45
____
____
____
____
____
3
____
5
____
5
____
5
____
8
____
10
____
10
____
25
____
3
0
____
3
0
____
3
0
____
3
0
____
____
____
____
____
35
20
25
40
NOTES:
1. 0° to +70°C temperature range only.
2. –55°C to +125°C temperature range only.
3. This parameter is guaranteed with AC Test load (Figure 2) by device characterization, but is not production tested.
Timing Waveform of Read Cycle No. 1
(1, 2)
t
RC
ADDRESS
t
AA
t
OH
DATA
OUT
PREVIOUS DATA VALID
DATA VALID
3090 drw 06
,
Timing Waveform of Read Cycle No. 2
(1, 3)
t
RC
CS
t
ACS
t
CHZ
(3)
DATA
OUT
VALID
HIGH IMPEDANCE
t
CLZ
(4)
DATA
OUT
HIGH IMPEDANCE
t
PU
t
PD
V
CC
SUPPLY
CURRENT
I
CC
I
SB
3090 drw 07
,
NOTES:
1.
WE
is HIGH for Read cycle.
2.
CS
is LOW for Read cycle.
3. Device is continuously selected,
CS
is LOW.
3. Address valid prior to or coincident with
CS
transition LOW.
4. Transition is measured ±200mV from steady state.
6.42
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
