74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
Rev. 7 — 30 November 2011
Product data sheet
1. General description
The 74LVC2G14 provides two inverting buffers with Schmitt-trigger input. It is capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the inputs
makes the circuit tolerant of slower input rise and fall time. This device is fully specified for
partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output,
preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Input accepts voltages up to 5 V
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C.
3. Applications
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator
NXP Semiconductors
74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
4. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LVC2G14GW
74LVC2G14GV
74LVC2G14GM
74LVC2G14GF
74LVC2G14GN
74LVC2G14GS
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SC-88
TSOP6
XSON6
XSON6
XSON6
XSON6
Description
plastic surface-mounted package; 6 leads
plastic extremely thin small outline package;
no leads; 6 terminals; body 1
1.45
0.5 mm
plastic extremely thin small outline package;
no leads; 6 terminals; body 1
1
0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0
1.0
0.35 mm
Version
SOT363
SOT886
SOT891
SOT1115
SOT1202
Type number
plastic surface-mounted package (TSOP6); 6 leads SOT457
5. Marking
Table 2.
Marking codes
Marking code
[1]
VK
V14
VK
VK
VK
VK
Type number
74LVC2G14GW
74LVC2G14GV
74LVC2G14GM
74LVC2G14GF
74LVC2G14GN
74LVC2G14GS
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
1
1A
1Y
6
1
6
1A
1Y
3
2A
2Y
4
3
mnb083
4
2A
2Y
mnb084
mnb082
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram
74LVC2G14
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 30 November 2011
2 of 20
NXP Semiconductors
74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
7. Pinning information
7.1 Pinning
74LVC2G14
74LVC2G14
1A
GND
1
2
6
5
1Y
GND
V
CC
2A
2A
3
001aab672
1A
1
6
1Y
1A
GND
74LVC2G14
1
2
3
6
5
4
1Y
V
CC
2Y
2
5
V
CC
3
4
2Y
2A
4
2Y
001aab673
001aaf957
Transparent top view
Transparent top view
Fig 4. Pin configuration SOT363
and SOT457
Fig 5. Pin configuration SOT886
Fig 6. Pin configuration SOT891,
SOT1115 and SOT1202
7.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
V
CC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data input
8. Functional description
Table 4.
Input
nA
L
H
[1]
H = HIGH voltage level;
L = LOW voltage level.
Function table
[1]
Output
nY
H
L
74LVC2G14
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 30 November 2011
3 of 20
NXP Semiconductors
74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
P
tot
T
stg
[1]
[2]
[3]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
total power dissipation
storage temperature
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
-
[1][2]
[1][2]
Max
+6.5
-
+6.5
50
V
CC
+ 0.5
+6.5
50
100
-
250
+150
Unit
V
mA
V
mA
V
V
mA
mA
mA
mW
C
V
O
> V
CC
or V
O
< 0 V
Active mode
Power-down mode
V
O
= 0 V to V
CC
0.5
0.5
-
-
100
T
amb
=
40 C
to +125
C
[3]
-
65
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When V
CC
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
For SC-88 and TSOP6 packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
For XSON6 packages: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
10. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
O
T
amb
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
Active mode
Power-down mode; V
CC
= 0 V
Conditions
Min
1.65
0
0
0
40
Typ
-
-
-
-
-
Max
5.5
5.5
V
CC
5.5
+125
Unit
V
V
V
V
C
74LVC2G14
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 30 November 2011
4 of 20
NXP Semiconductors
74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
=
40 C
to +85
C
V
OH
HIGH-level output voltage
V
I
= V
T+
or V
T
I
O
=
100 A;
V
CC
= 1.65 V to 5.5 V
I
O
=
4
mA; V
CC
= 1.65 V
I
O
=
8
mA; V
CC
= 2.3 V
I
O
=
12
mA; V
CC
= 2.7 V
I
O
=
24
mA; V
CC
= 3.0 V
I
O
=
32
mA; V
CC
= 4.5 V
V
OL
LOW-level output voltage
V
I
= V
T+
or V
T
I
O
= 100
A;
V
CC
= 1.65 V to 5.5 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
O
= 32 mA; V
CC
= 4.5 V
I
I
I
OFF
I
CC
I
CC
C
I
V
OH
input leakage current
power-off leakage current
supply current
additional supply current
input capacitance
HIGH-level output voltage
V
I
= 5.5 V or GND; V
CC
= 0 V to 5.5 V
V
I
or V
O
= 5.5 V; V
CC
= 0 V
V
I
= 5.5 V or GND;
V
CC
= 1.65 V to 5.5 V; I
O
= 0 A
V
I
= V
CC
0.6 V; I
O
= 0 A;
V
CC
= 2.3 V to 5.5 V
V
CC
= 3.3 V; V
I
= GND to V
CC
V
I
= V
T+
or V
T
I
O
=
100 A;
V
CC
= 1.65 V to 5.5 V
I
O
=
4
mA; V
CC
= 1.65 V
I
O
=
8
mA; V
CC
= 2.3 V
I
O
=
12
mA; V
CC
= 2.7 V
I
O
=
24
mA; V
CC
= 3.0 V
I
O
=
32
mA; V
CC
= 4.5 V
V
OL
LOW-level output voltage
V
I
= V
T+
or V
T
I
O
= 100
A;
V
CC
= 1.65 V to 5.5 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
O
= 32 mA; V
CC
= 4.5 V
I
I
input leakage current
V
I
= 5.5 V or GND; V
CC
= 0 V to 5.5 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.7
0.45
0.6
0.8
0.8
20
V
V
V
V
V
V
A
V
CC
0.1 -
0.95
1.7
1.9
2.0
3.4
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
5
3.5
0.1
0.45
0.3
0.4
0.55
0.55
5
10
10
500
-
V
V
V
V
V
V
A
A
A
A
pF
V
CC
0.1 -
1.2
1.9
2.2
2.3
3.8
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
Conditions
Min
Typ
[1]
Max
Unit
T
amb
=
40 C
to +125
C
74LVC2G14
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 30 November 2011
5 of 20
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
