NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMXRT1010CEC
Rev. 0, 09/2019
MIMXRT1011DAE5A
i.MX RT1010 Crossover
Processors Data Sheet
for Consumer Products
Package Information
Plastic Package
80-Pin LQFP, 12 x 12 mm, 0.5 mm pitch
Ordering Information
See
Table 1 on page 4
1
i.MX RT1010 introduction
1. i.MX RT1010 introduction . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 4
2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3. Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1. Special signal considerations . . . . . . . . . . . . . . . 12
3.2. Recommended connections for unused analog
interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 15
4.2. System power and clocks . . . . . . . . . . . . . . . . . . 21
4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.5. External memory interface . . . . . . . . . . . . . . . . . 34
4.6. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.7. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
4.8. Communication interfaces . . . . . . . . . . . . . . . . . . 49
4.9. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 55
5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 55
5.2. Boot device interface allocation . . . . . . . . . . . . . . 55
6. Package information and contact assignments . . . . . . . 57
6.1. 12 x 12 mm package information . . . . . . . . . . . . 57
7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
The i.MX RT1010 is a member of i.MX RT real-time
processor family based on the Arm® Cortex®-M7 core,
which operates at speeds up to 500 MHz to provide high
CPU performance and best real-time response.
The i.MX RT1010 processor has 128 KB on-chip RAM,
which can be flexibly configured as TCM or
general-purpose on-chip RAM. The i.MX RT1010
integrates advanced power management module with
DCDC and LDO that reduces complexity of external
power supply and simplifies power sequencing. The
i.MX RT1010 also provides various memory interfaces,
including Quad SPI, and a wide range of connectivity
interfaces, including UART, SPI, I2C, and USB; for
connecting peripherals including WLAN, Bluetooth™,
and GPS. The i.MX RT1010 also has rich audio features,
including SPDIF and I2S audio interface. Various analog
IP integration, including ADC, temperature sensor, and
etc.
NXP reserves the right to change the production detail specifications as may be required
to permit improvements in the design of its products.
i.MX RT1010 introduction
The i.MX RT1010 is specifically useful for applications, such as:
• Audio
• Industrial
• Motor Control
• Home Appliance
• IoT
1.1
Features
The i.MX RT1010 processors are based on Arm Cortex-M7 MPCore™ Platform, which has the
following features:
• Supports single Arm® Cortex®-M7 with:
— 16 KB L1 Instruction Cache
— 8 KB L1 Data Cache
— Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture
— Support the Armv7-M Thumb instruction set, defined in the ARM v7-M architecture
• Integrated MPU, up to 16 individual protection regions
• Up to 128 KB I-TCM and D-TCM in total
• Up to 500 MHz frequency
• Cortex® M7 CoreSight™ components integration for debug
• Frequency of the core, as per
Table 9, "Operating ranges," on page 16.
The SoC-level memory system consists of the following additional components:
— Boot ROM (64 KB)
— On-chip RAM (128 KB)
– Configurable RAM size up to 128 KB shared with CM7 TCM
External memory interfaces:
— SPI NOR FLASH
— Single/Dual channel Quad SPI FLASH with XIP support and on-the-fly decryption
— Octal flash
Timers and PWMs:
— Two General Programmable Timers (GPT)
– 4-channel generic 32-bit resolution timer for each
– Each support standard capture and compare operation
— Periodical Interrupt Timer (PIT)
– Generic 32-bit resolution timer
– Periodical interrupt generation
— FlexPWM
– Up to 4 submodules
i.MX RT1010 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 09/2019
2
NXP Semiconductors
•
•
i.MX RT1010 introduction
– 16-bit resolution PWM suitable for Motor Control applications
Each i.MX RT1010 processor enables the following interfaces to external devices (some of them are
muxed and not available simultaneously):
• Audio:
— SPDIF input and output
— Two synchronous audio interface (SAI) modules, which support I2S, AC97, TDM, and
codec/DSP interfaces
— MQS interface for medium quality audio via GPIO pads
• Connectivity:
— One USB 2.0 OTG controller with integrated PHY interface
— Four universal asynchronous receiver/transmitter (UART) modules
— Two I2C modules
— Two SPI modules
• GPIO and Pin Multiplexing:
— General-purpose input/output (GPIO) modules with interrupt capability
— Input/output multiplexing controller (IOMUXC) to provide centralized pad control
— 44 GPIOs for 80-pin LQFP package
— FlexIO
The i.MX RT1010 processors integrate advanced power management unit and controllers:
• Full PMIC integration, including on-chip DCDC and LDOs
• Temperature sensor with programmable trim points
• GPC hardware power management controller
The i.MX RT1010 processors support the following system debug:
• Arm® Cortex®-M7 CoreSight debug and trace architecture
• Trace Port Interface Unit (TPIU) to support off-chip real-time trace
• Support for 5-pin JTAG and SWD debug interfaces
1
Security functions are enabled and accelerated by the following hardware:
• High Assurance Boot (HAB)
• Data Co-Processor (DCP):
— AES-128, ECB, and CBC mode
— SHA-1 and SHA-256
— CRC-32
• FlexSPI with On-The-Fly AES Decryption (OTFAD)
— AES-128, CTR mode
— On-the-fly QSPI Flash decryption
• True random number generation (TRNG)
1. SWD is the default debug interface.
i.MX RT1010 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 09/2019
NXP Semiconductors
3
i.MX RT1010 introduction
•
•
Secure Non-Volatile Storage (SNVS)
— Secure real-time clock (RTC)
— Zero Master Key (ZMK)
Secure JTAG Controller (SJC)
NOTE
The actual feature set depends on the part numbers as described in
Table 1.
Functions such as connectivity interfaces, and security features are not
offered on all derivatives.
1.2
Ordering information
Table 1. Ordering information
Part Number
Features
• 500 MHz, consumer
grade for general
purpose
• DMA
• Boot ROM (64KB)
• On-chip RAM
(128KB)
• USB OTG x1
• SAI x2
• SPDIF x1
• MQS x1
• GPT x2
• PWM x1
• 4-channel PIT
• WDOG x4
• UART x4
• I2C x2
•
•
•
•
•
•
•
•
•
•
•
•
•
Package
Junction
Temperature
T
j
(C)
Table 1
provides orderable part numbers covered by this data sheet.
MIMXRT1011DAE5A
SPI x2
12 x 12 mm 80-pin LQFP, 0.5
0 to 95
KPP
mm pitch
ADC x1
FlexSPI
FLEXIO
GPIO
HAB/DCP/OTFAD
TRNG
SNVS
SJC
DCDC
Temperature sensor
GPC hardware power
management
controller
Figure 1
describes the part number nomenclature so that characteristics of a specific part number can be
identified (for example, cores, frequency, temperature grade, fuse options, and silicon revision). The
primary characteristic which describes which data sheet applies to a specific part is the temperature grade
(junction) field.
Ensure to have the proper data sheet for specific part by verifying the temperature grade (junction) field
and matching it to the proper data sheet. If there are any questions, visit the web page
nxp.com/IMXRT
or
contact an NXP representative for details.
i.MX RT1010 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 09/2019
4
NXP Semiconductors
i.MX RT1010 introduction
M
IMX
XX
@
##
%
+
VV
$
A
Qualification Level
Prototype Samples
Mass Production
Special
M
P
M
S
Silicon Rev
A0
A
A
Frequency
Part # series
i.MX RT
$
4
5
6
7
8
A
XX
RT
400 MHz
500 MHz
Family
First Generation RT family
Reserved
@
1
2
3
4
5
6
7
8
600 MHz
700 MHz
800 MHz
1000 MHz
VV
AE
Package Type
80-pin LQFP, 12 x 12 mm, 0.5 mm pitch
Sub-Family
01
02
05
06
##
RT1010
RT1020
RT1050
RT1060
Temperature
Tie
1
5
+
D
C
%
Standard Feature General Purpose
Enhanced Feature
Consumer: 0 to + 95 °C
Industrial: -40 to +105 °C
Figure 1. Part number nomenclature—i.MX RT1010
i.MX RT1010 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 09/2019
NXP Semiconductors
5
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