ISO 9001 CERTIFIED BY DSCC
M.S.KENNEDY CORP.
FEATURES:
WIDE BANDWIDTH VIDEO
AMPLIFIER SYSTEM
620
(315) 701-6751
4707 Dey Road Liverpool, N.Y. 13088
230 MHz Video Bandwidth With Vout=4Vpp
Transition Times Less Than 2.0nS With Vout=4Vpp
0 To 4 Volt High Input Impedance DC Drive Control With ±3dB Range
0 To 4 Volt High Input Impedance DC Contrast Control With 40dB Range
Externally Gated Comparator for Brightness Control
Simple To Parallel For RGB Color Tracking
0.5V to 9.0V Output Voltage Swing Capability
On Board Accurate Reference Voltage Generator
Available Fully Qualified to MIL-PRF-38534
MIL-PRF-38534 CERTIFIED
DESCRIPTION:
The MSK 620(B) is a very high frequency video amplifier system capable of driving displays with resolutions up to
1664 x 1200. Brightness is controlled with a gated differential input black level clamp comparator. There are also DC
inputs available for contrast control and drive control. All DC control inputs operate over a 0V to 4V input range and
feature high impedance inputs. The MSK 620(B) is packaged in a space efficient hermetically sealed 18 pin dip
package.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
Wideband Amplifier With Gain
and DC Offset Control
High Resolution CRT Monitor
Ultra High Performance Video Processing
1
2
3
4
5
6
7
8
9
1
PIN-OUT INFORMATION
Control Output (+)
Attn. Input (+)
Attn. Input (-)
Control Output (-)
Ground
Video Input
Contrast Control Input
Drive Control Input
Vref Output
10
11
12
13
14
15
16
17
18
Clamp Cap
Clamp Gate Input
Ground
+Vcc
Video Output
N/C
Clamp Input (-)
Clamp Input (+)
Ground
Rev. A 8/00
ABSOLUTE MAXIMUM RATINGS
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ELECTRICAL SPECIFICATIONS
Group A
+Vcc=+12.0V Unless Otherwise Specified
Parameter
STATIC
Power Supply Current
Video Input Bias Voltage
Clamp Gate High Input Voltage
Clamp Gate Low Input Voltage
DYNAMIC CHARACTERISTICS
Video Amplifier Gain
5
Test Conditions
1
MSK 620B
Typ.
60
2.65
-
-
20
0.2
10
-23
20
6
230
1.5
1.5
5.00
0.006
0.005
0.18
Max.
68
2.9
-
0.8
24
0.65
-
-
-
-
-
2.0
2.0
5.05
0.01
0.01
0.45
Min.
-
2.0
1.8
-
16
-
9.0
-
-
5
190
-
-
4.9
-
-
-
MSK 620
Typ.
60
2.65
-
-
20
0.2
10
-23
20
6
200
2.0
2.0
5.0
0.006
0.005
0.18
Max.
72
2.9
-
1.0
24
0.65
-
-
-
-
-
3.0
3.0
5.1
0.01
0.01
0.45
Subgroup Min.
1,2,3
1,2,3
1,2,3
1,2,3
4
-
2.0
2.0
-
16
-
9.0
-
-
5
200
-
-
4.95
-
-
-
R
LOAD
=∞
V
IN
=N/C
Comparator Off
Comparator On
Video Output Low Voltage
5
Video Output High Voltage
5
Attenuation
2
Video Amplifier Input Resistance
2
Gain Range
5
-3dB Video Amplifier Bandwidth
5
Output Rise Time
5
Output Fall Time
5
VOLTAGE REFERENCE
Output Voltage
Line Regulation
2
Clamp Cap Voltage = 0V
Clamp Cap Voltage = 6V
V
CONTRAST
=0.5V
f
IN
=12KHz
V
DRIVE
=0V to 4V
V
0
=4V
PP
V
0
=4V
PP
V
0
=4V
PP
I
L
=0mA Ext
V
CC
=11V to 13V
I
L
=0 to 10mA
-55°C≤Tc≤125°C
4
4
-
-
4
4
4
4
1
-
-
-
Load Regulation
2
Output Voltage Change w/Temp.
2
NOTES:
1
2
3
4
5
6
R
IN
=30Ω, C
IN
=10µF, R
L
=499Ω, unless otherwise specified. Clamp Gate Input=0V, V
CONTRAST
=V
DRIVE
=V
BRIGHTNESS
=4V.
Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only.
Industrial grade devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ('B' suffix) shall be 100% tested to subgroups 1,2,3 and 4.
Subgroup 5 and 6 testing available upon request.
Subgroup 1,4
T
A
=T
C
=+25°C
Subgroup 2,5
T
A
=T
C
=+125°C
Subgroup 3,6
T
A
=T
C
=-55°C
2
Rev. A 8/00
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V
IN
I
OUT
I
OUTREF
Vcc≥Vin≥GND
28.0mA
20mA
T
C
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+V
CC
θ
JC
Supply Voltage
Thermal Resistance
(Junction to Case)
Voltage At Any Input Pin
Video Output Current
Reference Output Current
+13.5V
19.0°C/W
T
ST
T
LD
Storage Temperature Range -65°C to +150°C
Lead Temperature Range
300°C
(10 Seconds)
Case Operating Temperature
MSK620
-40°C to +85°C
MSK620B
-55°C to +125°C
Junction Temperature
150°C
Units
mA
V
V
V
V/V
V
V
dB
KΩ
dB
MHz
nS
nS
V
%/V
%/mA
%
APPLICATION NOTES
VIDEO INPUT
Pin 6 is the video input pin. The video input signal is coupled
to this point through a 30Ω, 10µF 'RC' filter as shown in figure
two. The MSK 620 is designed to receive input voltages as
high as ±13.5V.
CLAMP CONNECTIONS
Pin 16 is the (-) clamp input pin. This pin is the inverting
input to the clamp comparator. A 10KΩ feedback resistor is
connected from this pin to the output pin of the amplifier (pin
14). When the clamp comparator is enabled, the voltage at pin
16 is compared to the voltage at pin 17, which is the non-
inverting input of the clamp comparator. A source or sink cur-
rent is generated at pin 10 to charge or discharge the clamp
cap and supply DC bias to the video amplifier. The DC voltage
at pin 17 is user adjustable through a 100KΩ potentiometer
voltage divider to Vref (see Figure 2). In DC coupled cathode
drive applications, brightness can be varied by varying the DC
voltage at pin 17.
OUTPUT
Pin 14 is the video output pin. Since the output of the MSK
620 is a push pull design, there is no need for an external
pullup resistor. A 499Ω load resistor to analog ground will
optimize the output stage current level and bandwidth and is
highly recommended.
POWER SUPPLY CONNECTIONS
Pin 13 is the positive power supply pin. Convenient internal
power supply decoupling consists of a parallel combination of
three capacitors ranging from 0.01µF to 0.47µF. The user is
advised to connect at least a 4.7µF tantalum decoupling ca-
pacitor as close to the power supply pin as possible.
NO CONNECT PINS
Pins 15 is a no connect pin and should be tied to the nearest
available video ground plane.
DC RESTORATION
Pin 11 is the clamp gate input pin and is driven by a TTL back
porch clamp signal. A voltage level of +1.3V or less is a "low
level" and a voltage level of +1.5V or greater is a "high level".
An active low level at this pin enables the clamp comparator
section so that DC restoration can be accomplished. This pin
should be held at a "high" logic level when a back porch clamp
signal is not used.
Vref OUTPUT
Pin 9 is the Vref output pin. This pin connects to the output
of an ultra stable 5.0VDC reference voltage generator internal
to the MSK 620. This reference is used as a voltage source for
the contrast, drive and clamp inputs.
CONTRAST CONTROL
To achieve contrast control, pin 1 is shorted to pin 2 and pin
3 is shorted to pin 4. The voltages at pins 1 and 4 are con-
trolled by the input voltage at pin seven. As the voltage at pin
7 increases, the voltages at pins 1 and 4 become offset. With
pin 7 at zero volts, pins 1 and 4 are at minimum offset and the
contrast is set to the minimum value of -38dB typical. With pin
7 at 4V, pins 1 and 4 are at maximum offset and contrast is
maximized to +26dB. Pin 7 is internally decoupled to ground
with a 0.1uF capacitor.
DRIVE CONTROL
Pin 8 is the drive control input. This pin accepts a DC voltage
to control overall gain. Pin 8 is internally decoupled to ground
with a 0.1uF capacitor. With 0V at pin 8, the gain is minimum
(-6dB). With 4V at pin 8, the gain is maximum (0dB). Drive
control is approximated by the following formula:
ATTENUATION (dB) = (1.5) x (DRIVE VOLTAGE) - (6dB)
See graph of Attenuation vs. Drive Control Voltage.
CLAMP CAP
Pin 10 is the clamp comparator output pin. A capacitance of
approximately 0.1µF is connected from this pin to ground. Dur-
ing the "back porch" portion of the clamp signal, the clamp
capacitor is either charged or discharged to match the voltage
set on the non-inverting input of the clamp comparator (pin
16). During the video portion of the input signal, the clamp
comparator is disabled and the clamp cap holds the proper DC
bias in the video amplifier.
3
A typical single video channel connection diagram for the
MSK 620 is shown in Figure 1 above. The DC voltage at pin 6
is internally fixed at +2.6V and the video signal is AC coupled
to the input. An internal reference voltage generator supplies a
+5.0VDC level at pin 9 for use with the contrast, drive and
brightness control potentiometers. With pin 7 at 0V, minimum
gain is realized. With pin 7 at 4V, maximum gain is realized.
The clamp gate input at pin 11 accepts a TTL level clamp signal
for DC restoration during the back porch segment of the video
signal. Pin 17 is the brightness control input pin and accepts a
zero to four volt DC level. This level sets the black level of the
signal. If pin 17=+1VDC the signal black level will be +1VDC.
The 499Ω load resistor biases the class A output stage and
should be included during the power dissipation calculation stage.
499Ω is the minimum recommended value of load resistance
for the MSK 620.
Rev. A 8/00
COMPLETE RGB VIDEO SYSTEM
A typical connection diagram for a red, green, blue video amplifier system is shown in Figure 2. To achieve optimum contrast
tracking, a master slave contrast connection is utilized. This is accomplished by connecting pins 1 and 2 of all three preamplifiers
together and using the contrast control of one channel to vary the contrast of all three channels simultaneously. White balance is
achieved through individual drive controls. Black level can also be adjusted for each channel by adjusting the voltage at pin 17. If
the cathode is AC coupled, the video signal is DC restored at the cathode. In that case black level clamping can be accomplished
by biasing pin 17 to the desired black level. The video output pins of the MSK 620 rests at approximately +3.9VDC and the input
of the MSK 640 must be biased at approximately +1.55VDC. D1, D2, D3 and Q1 act as a level shifting stage to match the DC
level requirements of the preamplifier and the driver. Black level control is accomplished with R8 and R9 sampling the output and
feeding it back to the clamping section of the MSK 620. This scheme provides black level control superior to locally sampling the
MSK 620 output and feeding that back to the clamping section.
5
Rev. A 8/00
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