TJA1462
CAN FD signal improvement transceiver with Standby mode
Rev. 1 — 12 August 2020
Product data sheet
1
General description
The TJA1462 is a member of the TJA146x family of transceivers that provide an interface
between a Controller Area Network (CAN) or CAN FD (Flexible Data rate) protocol
controller and the physical two-wire CAN bus. TJA146x transceivers implement the CAN
physical layer as defined in ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5, and
are fully interoperable with high-speed Classical CAN and CAN FD transceivers.
The TJA1462 includes CAN Signal Improvement Capability (SIC), as defined in
CiA 601-4. CAN signal improvement significantly reduces signal ringing in a network,
allowing reliable CAN FD communication to function in larger topologies. In addition, the
TJA1462 features a much tighter bit timing symmetry performance to enable CAN FD
communication at 5 Mbit/s with a higher number of nodes and stub topologies. CAN FD
operation at 8 Mbit/s and beyond is supported in point-to-point networks.
The TJA1462 is intended as a simple replacement for high-speed Classical CAN and
CAN FD transceivers, such as the TJA1042 or TJA1044GT from NXP. It offers pin
compatibility and is designed to avoid changes to hardware and software design,
allowing the TJA1462 to be easily retrofitted to existing applications.
An AEC-Q100 Grade 0 variant, the TJR1462, is available for high temperature
applications, supporting operation at 150 °C ambient temperature.
1.1 TJA1462 variants
The TJA1462 comes in two variants, each available in an SO8 or HVSON8 package:
•
The TJA1462A is a high-speed CAN transceiver with Normal and Standby modes and
a VIO supply pin. The VIO pin allows for direct interfacing with 3.3 V- and 5 V-supplied
microcontrollers.
•
The TJA1462B is a high-speed CAN transceiver with Normal and Standby modes.
2
Features and benefits
2.1 General
•
ISO 11898-2:2016, SAE J2284-1 to SAE J2284-5 and SAE J1939-14 compliant
•
Implements CAN Signal Improvement Capability as defined in CiA 601-4 to significantly
reduce signal ringing effects in a network
•
Much tighter bit timing symmetry performance allowing more time to reduce signal
ringing
•
Low Electromagnetic Emission (EME) and high Electromagnetic Immunity (EMI)
•
Qualified according to AEC-Q100 Grade 1
•
TJA1462A only: VIO input for interfacing with 3.3 V to 5 V microcontrollers
NXP Semiconductors
CAN FD signal improvement transceiver with Standby mode
•
All variants are available in SO8 and leadless HVSON8 (3.0 mm x 3.0 mm) packages;
HVSON8 with improved Automated Optical Inspection (AOI) capability.
•
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
TJA1462
2.2 Predictable and fail-safe behavior
•
Undervoltage detection with defined handling on all supply pins
•
Full functionality guaranteed from the undervoltage detection thresholds up to the
maximum limiting voltage values
•
Defined behavior below the undervoltage detection thresholds
•
Transceiver disengages from the bus (high-ohmic) when the supply voltage drops
below the Off mode threshold
•
Internal biasing of TXD and mode selection input pins, to enable defined fail-safe
behavior
2.3 Low-power management
•
Very low-current Standby mode with host and bus wake-up capability
•
TJA1462A only: CAN wake-up receiver powered by V
IO
allowing V
CC
to be shut down
•
CAN wake-up pattern filter time of 0.5 μs to 1.8 μs, meeting Classical CAN and CAN
FD requirements
2.4 Protection
•
•
•
•
High ESD handling capability on the bus pins (6 kV IEC and 8 kV HBM)
Bus pins protected against transients in automotive environments
Transmit Data (TXD) dominant time-out function
Thermally protected
TJA1462
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
2 / 33
NXP Semiconductors
CAN FD signal improvement transceiver with Standby mode
TJA1462
3
Quick reference data
Parameter
supply voltage
supply current
Normal mode, dominant
Normal mode, recessive
Standby mode; TJA1462A
Standby mode; TJA1462B
Conditions
Min
4.5
-
-
-
-
4
50
2.65
2.95
Normal mode, dominant; V
TXD
= 0 V
Normal mode, recessive; V
TXD
= V
IO
Standby mode
-
-
-
2.65
IEC 61000-4-2 on pins CANH and CANL -6
limiting value according to IEC 60134
limiting value according to IEC 60134
-36
-36
-40
Typ
-
42
7
-
8
-
-
-
-
250
150
8
-
-
-
-
-
Max
5.5
70
10
2
21
4.5
-
2.95
5.5
760
460
19
2.95
+6
+40
+40
+150
Unit
V
mA
mA
μA
μA
V
mV
V
V
µA
µA
µA
V
kV
V
V
°C
Table 1. Quick reference data
Symbol
V
CC
I
CC
V
uvd(stb)(VCC)
V
uvhys(stb)(VCC)
V
uvd(swoff)(VCC)
V
IO
I
IO
standby undervoltage detection
voltage on pin VCC
standby undervoltage hysteresis
voltage on pin VCC
switch-off undervoltage detection TJA1462B
voltage on pin VCC
supply voltage on pin VIO
supply current on pin VIO
V
uvd(swoff)(VIO)
V
ESD
V
CANH
V
CANL
T
vj
switch-off undervoltage detection
voltage on pin VIO
electrostatic discharge voltage
voltage on pin CANH
voltage on pin CANL
virtual junction temperature
4
Ordering information
Package
Name
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic thermal enhanced very thin small outline package; no
leads; 8 terminals; body 3 × 3 × 0.85 mm
Version
SOT96-1
SOT782-1
SO8
HVSON8
Table 2. Ordering information
Type number
TJA1462AT
TJA1462BT
TJA1462ATK
TJA1462BTK
TJA1462
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© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
3 / 33
NXP Semiconductors
CAN FD signal improvement transceiver with Standby mode
TJA1462
5
Block diagram
VIO
(1)
5
VCC
3
V
IO
/V
CC(2)
TEMPERATURE
PROTECTION
7
TRANSMITTER
CANH
TXD
1
TIME-OUT
6
CANL
V
IO
/V
CC(2)
STB
8
MODE
CONTROL
V
IO
/V
CC(2)
normal
receiver
RXD
4
MUX
AND
DRIVER
WAKE-UP
FILTER
2
GND
low-power
receiver
aaa-038094
(1) V
IO
is only available in the TJA1462A (pin 5 is not connected in the TJA1462B).
(2) V
IO
in TJA1462A; V
CC
in TJA1462B.
Figure 1. Block diagram
TJA1462
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
4 / 33
NXP Semiconductors
CAN FD signal improvement transceiver with Standby mode
TJA1462
6
Pinning information
6.1 Pinning
TXD
GND
VCC
RXD
1
2
3
4
aaa-030475
8
7
6
5
STB
CANH
CANL
VIO
TXD
GND
VCC
RXD
1
2
3
4
aaa-030476
8
7
6
5
STB
CANH
CANL
n.c.
TJA1462AT: SO8
terminal 1
index area
TXD 1
GND 2
VCC 3
RXD 4
8 STB
7 CANH
6 CANL
5 VIO
aaa-030477
TJA1462BT: SO8
terminal 1
index area
TXD 1
GND 2
VCC 3
RXD 4
8 STB
7 CANH
6 CANL
5 n.c.
aaa-030478
Transparent top view
Transparent top view
TJA1462ATK: HVSON8
Figure 2. Pin configuration diagrams
TJA1462BTK: HVSON8
6.2 Pin description
Table 3. Pin description
Symbol
TXD
GND
VCC
RXD
VIO
n.c.
CANL
CANH
STB
[1]
[2]
[2]
Pin
1
2
3
4
5
6
7
8
Type
I
G
P
O
P
-
AIO
AIO
I
[1]
Description
transmit data input; inputs data (from the CAN controller) to be written to the bus lines
ground
5 V supply voltage input
receive data output; outputs data read from the bus lines (to the CAN controller)
supply voltage input for I/O level adapter in TJA1462A
not connected in TJA1462B
LOW-level CAN bus line
HIGH-level CAN bus line
Standby mode control input; active-HIGH
I: digital input; O: digital output; AIO: analog input/output; P: power supply; G: ground.
HVSON package die supply ground is connected to both the GND pin and the exposed center pad. The GND pin must be soldered to board ground. For
enhanced thermal and electrical performance, it is also recommended to solder the exposed center pad to board ground.
TJA1462
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
5 / 33
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