TJA1463
CAN FD signal improvement transceiver with Sleep mode
Rev. 1 — 12 August 2020
Product data sheet
1
General description
The TJA1463 is a member of the TJA146x family of transceivers that provide an interface
between a Controller Area Network (CAN) or CAN FD (Flexible Data rate) protocol
controller and the physical two-wire CAN bus. TJA146x transceivers implement the CAN
physical layer as defined in ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5, and
are fully interoperable with high-speed Classical CAN and CAN FD transceivers.
The TJA1463 includes CAN Signal Improvement Capability (SIC), as defined in
CiA 601-4. CAN signal improvement significantly reduces signal ringing in a network,
allowing reliable CAN FD communication to function in larger topologies. In addition, the
TJA1463 features a much tighter bit timing symmetry performance to enable CAN FD
communication at 5 Mbit/s with a higher number of nodes and stub topologies. CAN FD
operation at 8 Mbit/s and beyond is supported in point-to-point networks.
The TJA1463 is intended as a simple replacement for high-speed Classical CAN and
CAN FD transceivers, such as the TJA1043 from NXP. It offers pin compatibility and is
designed to avoid changes to hardware and software design, allowing the TJA1463 to be
easily retrofitted to existing applications.
An AEC-Q100 Grade 0 variant, the TJR1463, is available for high temperature
applications, supporting operation at 150 °C ambient temperature.
2
Features and benefits
2.1 General
•
ISO 11898-2:2016, SAE J2284-1 to SAE J2284-5 and SAE J1939-14 compliant
•
Implements CAN Signal Improvement Capability as defined in CiA 601-4 to significantly
reduce signal ringing effects in a network
•
Much tighter bit timing symmetry performance allowing more time to reduce signal
ringing
•
Low Electromagnetic Emission (EME) and high Electromagnetic Immunity (EMI)
•
Qualified according to AEC-Q100 Grade 1
•
VIO input for interfacing with 3.3 V to 5 V microcontrollers
•
Listen-only mode for node diagnosis and failure containment
•
Available in SO14 and leadless HVSON14 (3.0 mm x 4.5 mm) packages; HVSON14
with improved Automated Optical Inspection (AOI) capability.
•
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
2.2 Predictable and fail-safe behavior
•
Undervoltage detection with defined handling on all supply pins
NXP Semiconductors
CAN FD signal improvement transceiver with Sleep mode
•
Full functionality guaranteed from the undervoltage detection thresholds up to the
maximum limiting voltage values
•
Defined behavior below the undervoltage detection thresholds
•
Transceiver disengages from the bus (high-ohmic) when the battery voltage drops
below the Off mode threshold
•
Internal biasing of TXD and mode selection input pins, to enable defined fail-safe
behavior
TJA1463
2.3 Low-power management
•
Very low-current Standby and Sleep modes, with host, local and bus wake-up
capability
•
Entire node with TJA1463 can be powered down while still supporting local, bus and
host wake-up
•
CAN wake-up receiver powered by V
BAT
allowing V
IO
and V
CC
to be shut down
•
CAN wake-up pattern filter time of 0.5 μs to 1.8 μs, meeting Classical CAN and CAN
FD requirements
2.4 Diagnosis & Protection
•
Overtemperature diagnosis
•
Transmit Data (TXD) dominant time-out and TXD-to-RXD short-circuit handler with
diagnosis
•
Bus dominant failure diagnosis
•
Cold start diagnosis (first battery connection)
•
High ESD handling capability on the bus pins (6 kV IEC and 8kV HBM)
•
Bus pins and VBAT protected against transients in automotive environments
•
Thermally protected
TJA1463
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
2 / 37
NXP Semiconductors
CAN FD signal improvement transceiver with Sleep mode
TJA1463
3
Quick reference data
Parameter
battery supply voltage
battery supply current
undervoltage detection voltage
on pin VBAT
supply voltage
supply current
Normal mode, dominant
Normal mode, recessive
Listen-only mode
Standby or Sleep mode
Normal or Listen-only mode
Standby or Sleep mode
Conditions
Min
4.5
-
-
4
4.5
-
-
-
-
4
50
2.95
Normal mode, dominant; V
TXD
= 0 V
Normal or Listen-only mode, recessive;
V
TXD
= V
IO
Standby or Sleep mode
-
-
-
2.65
50
IEC 61000-4-2 on pins CANH and CANL -6
limiting value according to IEC 60134
limiting value according to IEC 60134
-36
-36
-40
Typ
-
80
13
-
-
42
7
5
-
-
-
-
90
-
-
-
-
-
-
-
-
Max
28
300
26
4.5
5.5
70
10
8
2
4.5
-
5.5
250
3
2
2.95
-
+6
+40
+40
+150
Unit
V
µA
µA
V
V
mA
mA
mA
μA
V
mV
V
µA
µA
µA
V
mV
kV
V
V
°C
Table 1. Quick reference data
Symbol
V
BAT
I
BAT
V
uvd(VBAT)
V
CC
I
CC
V
uvd(VCC)
V
uvhys(VCC)
V
IO
I
IO
undervoltage detection voltage V
BAT
> 4.5 V
on pin VCC
undervoltage hysteresis
voltage on pin VCC
supply voltage on pin VIO
supply current on pin VIO
V
uvd(VIO)
V
uvhys(VIO)
V
ESD
V
CANH
V
CANL
T
vj
undervoltage detection voltage V
BAT
> 4.5 V
on pin VIO
undervoltage hysteresis
voltage on pin VIO
electrostatic discharge voltage
voltage on pin CANH
voltage on pin CANL
virtual junction temperature
4
Ordering information
Package
Name
Description
plastic small outline package; 14 leads; body width 3.9 mm
plastic thermal enhanced very thin small outline package; no
leads; 14 terminals; body 3 × 4.5 × 0.85 mm
Version
SOT108-1
SOT1086-2
SO14
HVSON14
Table 2. Ordering information
Type number
TJA1463AT
TJA1463ATK
TJA1463
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
3 / 37
NXP Semiconductors
CAN FD signal improvement transceiver with Sleep mode
TJA1463
5
Block diagram
VIO
5
VCC
3
VBAT
10
V
IO
TEMPERATURE
PROTECTION
13
TRANSMITTER
CANH
TXD
1
V
BAT
5V
TIME-OUT
12
CANL
WAKE
9
V
IO
ERR_N
8
STB_N
14
MODE
CONTROL
AND
WAKE-UP
CONTROL
AND
LOCAL
FAILURE
DETECTION
V
BAT
7
INH
EN
6
V
IO
MUX
AND
DRIVER
normal
receiver
RXD
4
WAKE-UP
FILTER
low-power
receiver
11
n.c.
2
GND
aaa-038098
Figure 1. TJA1463 block diagram
TJA1463
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
4 / 37
NXP Semiconductors
CAN FD signal improvement transceiver with Sleep mode
TJA1463
6
Pinning information
6.1 Pinning
terminal 1
index area
TXD
TXD
GND
VCC
RXD
VIO
EN
INH
1
2
3
4
5
6
7
aaa-038082
1
2
3
4
5
6
7
14 STB_N
13 CANH
12 CANL
11 n.c.
10 VBAT
9
8
aaa-038083
14 STB_N
13 CANH
12 CANL
11 n.c.
10 VBAT
9
8
WAKE
ERR_N
GND
VCC
RXD
VIO
EN
INH
WAKE
ERR_N
Transparent top view
TJA1463AT: SO14
Figure 2. Pin configuration diagrams
TJA1463ATK: HVSON14
6.2 Pin description
Table 3. Pin description
Symbol
TXD
GND
VCC
RXD
VIO
EN
INH
ERR_N
WAKE
VBAT
n.c.
CANL
CANH
STB_N
[1]
[2]
[2]
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Type
I
G
P
O
P
I
AO
O
AI
P
-
AIO
AIO
I
[1]
Description
transmit data input; inputs data (from the CAN controller) to be written to the bus lines
ground
5 V supply voltage input
receive data output; outputs data read from the bus lines (to the CAN controller)
supply voltage input for I/O level adapter
enable control input
inhibit output for switching external voltage regulators
local failure detection; wake-up source recognition and power-on indication output
(active-LOW)
local wake-up input
battery supply voltage input
not connected
LOW-level CAN bus line
HIGH-level CAN bus line
Standby mode control input (active-LOW)
I: digital input; O: digital output; AI: analog input; AO: analog output; AIO: analog input/output; P: power supply; G: ground
HVSON14 package die supply ground is connected to both the GND pin and the exposed center pad. The GND pin must be soldered to board ground.
For enhanced thermal and electrical performance, it is also recommended to solder the exposed center pad to board ground.
TJA1463
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 12 August 2020
5 / 37
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