2ED24427N01F
10 A dual -channel low-side gate driver IC
Features
10 A sink and 10 A source driver capability
11.5 V under voltage lockout
24 V maximum supply voltage
Enable function
CMOS Schmitt-triggered inputs
Output in phase with input
3.3 V, 5 V and 15 V input logic compatible
2 kV ESD HBM
RoHS compliant
Product summary
V
CC
= 12.5 V to 24 V
I
o+pk
/ I
o- pk
(typ.) =+ 10 A/ - 10 A
t
ON
/ t
OFF
(max.) = 40 ns/ 55 ns
Package
Potential applications
Driving high current IGBTs, enhancement mode N-Channel MOSFETs
directly or through a gate drive transformer in various power electronic
applications in single or parallel combinations
Typical Infineon recommendations are as below:
Electric vehicle (EV) charging stations and battery management systems
DC-DC converters
Industrial Drives
Industrial SMPS
Motor control
Industrial applications
General purpose low-side gate driver
Power Pad DSO-8
Product validation
Qualified for industrial applications according to the relevant tests of JEDEC JESD47/22 and J-STD-020.
Ordering information
Base part number
2ED24427N01F
Package type
PG-DSO-8-900
Standard pack
Form
Tape and Reel
Quantity
2500
Orderable part number
2ED24427N01FXUMA1
Datasheet
Please read the Important Notice and Warnings at the end of this document
www.infineon.com/gdLowSide
Page 1 of 21
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2ED24427N01F
10 A dual -channel low-side gate driver IC
Description
The 2ED24427N01F is a low-voltage, power MOSFET and IGBT non-inverting gate driver. Proprietary latch
immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with
standard CMOS or LSTTL output. The output driver features a current buffer stage. The output drivers feature a
high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays between
two channels are matched. Internal circuitry on VCC pin provides an under voltage lockout protection that
holds output low until Vcc supply voltage is within operating range.
* This diagram shows electrical connections only. Please refer to our application notes and design tips for proper circuit board layout.
Figure 1
Typical application block diagram
Datasheet
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2ED24427N01F
10 A dual -channel low-side gate driver IC
1
1
2
3
3.1
3.2
3.3
4
4.1
4.2
4.3
4.4
5
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
6
7
7.1
7.2
8
9
9.1
10
Table of contents
Table of contents ................................................................................................................... 3
Block diagram........................................................................................................................ 4
Pin configuration, functionality and logic truth-table ................................................................ 5
Pin configuration ..................................................................................................................................... 5
Pin functionality ...................................................................................................................................... 5
Input/output logic truth table ................................................................................................................ 5
Electrical parameters ............................................................................................................. 6
Absolute maximum ratings ..................................................................................................................... 6
Recommended operating conditions..................................................................................................... 6
Static electrical characteristics ............................................................................................................... 7
Dynamic electrical characteristics .......................................................................................................... 7
Application information and additional details .......................................................................... 8
Gate driver ............................................................................................................................................... 8
Bridge tied gate transformer driver (BT-GTD) ........................................................................................ 8
Driving circuitry design: thermal considerations ................................................................................. 11
Bias and transient conditions ............................................................................................................... 11
System functionality with improved thermal behavior ....................................................................... 12
Square input pulse distortion ............................................................................................................... 12
Bypass capacitor ................................................................................................................................... 13
Additional Details .................................................................................................................................. 13
Qualification information....................................................................................................... 15
Package details ..................................................................................................................... 16
Tape and reel details: PG-DSO8-900 ..................................................................................................... 17
Part marking information ..................................................................................................................... 17
Related products................................................................................................................... 18
Additional documentation and resources................................................................................. 19
Infineon online forum resources .......................................................................................................... 19
Revision history .................................................................................................................... 20
Product summary ........................................................................................................................................................ 1
Description……………. ............................................................................................................................................... 2
Datasheet
www.infineon.com/gdLowSide
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2ED24427N01F
10 A dual -channel low-side gate driver IC
3
3.1
Pin configuration, functionality and logic truth-table
Pin configuration
1 EN
2
INA
NC
OUTA
VCC
8
7
6
3 COM
4
INB
OUTB
5
8-Lead Power Pad DSO-8 (150 mil)
2ED24427N01F
Figure 3
2ED24427N01Fpin assignments (top view)
3.2
Table 1
Pin no.
1
2
3
4
5
6
7
8
Pin functionality
Symbol
EN
INA
COM
INB
OUTB
VCC
OUTA
NC
Enable pin
Logic input for gate driver output (OUTA), in phase
Ground
Logic input for gate driver output (OUTB), in phase
Gate drive output B
Supply voltage
Gate drive output A
No connection
Description
3.3
Table 2
EN
L
L
H
H
Input/output logic truth table
Input/output logic truth table
INA
X
X
L
H
INB
OUTA
L
L
L
H
OUTB
L
L
L
H
L
H
This table is held true in the voltages ranges defined in the recommended conditions section.
Datasheet
www.infineon.com/gdLowSide
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2019-11-10
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