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UC1907, UC2907, UC3907
LOAD SHARE CONTROLLER
SLUS165C – MARCH 1999 - REVISED JANUARY 2002
FEATURES
D
Fully Differential High Impedance Voltage
D
D
D
D
D
Sensing
C/S OUT
C/S (+)
Accurate Current Amplifier for Precise
C/S (–)
Current Sharing
(–) SENSE
Opto Coupler Driving Capability
POWER RETURN
1.25% Trimmed Reference
ARTIFICIAL GND
Master Status Indication
VREF
ISET
4.5-V to 35-V Operation
C/S OUT
PLCC-20, LCC-20,
Q OR L PACKAGE
(TOP VIEW)
CURRENT SHARE BUS
STATUS INDICATE
SOIC-16 DW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
STATUS INDICATE
CURRENT SHARE BUS
ADJ OUT
ADJ INPUT
COMP
(+) SENSE
VCC
OPTO DRIVE
C/S (+)
3
2
N/C
DIL-16 J or N PACKAGE
(TOP VIEW)
C/S OUT
C/S (+)
C/S (–)
(–) SENSE
POWER RETURN
ARTIFICIAL GND
VREF
ISET
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
20 19
18
17
16
15
14
C/S (–)
(–) SENSE
N/C
POWER RETURN
ARTIFICIAL GND
4
5
6
7
8
9 10 11 12 13
ADJ OUT
ADJ INPUT
N/C
COMP
(+) SENSE
OPTO DRIVE
VREF
ISET
N/C
DESCRIPTION
The UCx907 family of load share controller ICs provides all the necessary features to allow
multiple-independent-power modules to be paralleled such that each module supplies only its proportionate share
to total-load current.
This sharing is accomplished by controlling each module’s power stage with a command generated from a
voltage-feedback amplifier whose reference can be independently adjusted in response to a common-share-bus
voltage. By monitoring the current from each module, the current share bus circuitry determines which paralleled
module would normally have the highest output current and, with the designation of this unit as the master, adjusts
all the other modules to increase their output current to within 2.5% of that of the master.
The current share bus signal interconnecting all the paralleled modules is a low-impedance, noise-insensitive line
which will not interfere with allowing each module to act independently should the bus become open or shorted to
ground. The UC3907 controller will reside on the output side of each power module and its overall function is to supply
a voltage feedback loop. The specific architecture of the power stage is unimportant. Either switching or linear designs
may be utilized and the control signal may be either directly coupled or isolated though the use of an optocoupler or
other isolated medium.
Other features of the UC3907 include 1.25% accurate reference: a low-loss, fixed-gain current-sense amplifier, a fully
differential, high-impedance voltage sensing capability, and a status indicator to designate which module is
performing as master.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
VCC
STATUS INDICATE
CURRENT SHARE BUS
ADJ OUT
ADJ INPUT
COMP
(+) SENSE
VCC
OPTO DRIVE
Copyright
2000, Texas Instruments Incorporated
www.ti.com
1
UC1907, UC2907, UC3907
LOAD SHARE CONTROLLER
SLUS165C – MARCH 1999 - REVISED JANUARY 2002
block diagram
VOLTAGE ERROR AMPLIFIER
(+) SENSE
11
–
+
0.25 V
+
V CC
1.75 V
DRIVE
1.0 V AMPLIFIER
+
+
DRV
–
1 kΩ
20 k
Ω
50 kΩ
8
14
ADJUST
AMPLIFIER
17.5 kΩ
–
ADJ
+
50 mV
+
13
ADJ INPUT
ISET
ADJ OUT
12
9
COMP
OPTO DRIVE
VCC (4.5 V TO 35 V) 10
GROUND
AMPLIFIER
–
GND
+
V REF
1.75 V
(–) SENSE
POWER RTN
ARTIFICIAL GND
VREF
C/S OUT
4
5
6
7
1
40 kΩ
CURRENT SENSE
AMPLIFIER
–
+
40 k
Ω
100
BUFFER
AMPLIFIER
–
+
10 k
Ω
16
STATUS INDICATE
15
CURRENT SHARE BUS
2 kΩ
C/S (–)
C/S (+)
3
2 kΩ
2
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
†
Supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V
Opto out voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V
Opto out current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Status indicate sink current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
C/S input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V
Share bus voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 35 V
Other analog inputs and outputs (zener clamped) maximum forced voltage . . . . . . . . . . . . . . . . –0.3 V to10 V
Other analog inputs and outputs (zener clamped) maximum forced current . . . . . . . . . . . . . . . . . . . . .
±10
mA
Ground amp sink current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Pins 1, 9, 12, 15 sink current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Junction temperature, T
J
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
Lead temperature (solder 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
† Pin Nos. refer to 16 Pin DIL Package.
‡ Currents are positive into, negative out of the specified terminal. Consult packaging section of databook for thermal limitations and considerations
of package.
2
www.ti.com
UC1907, UC2907, UC3907
LOAD SHARE CONTROLLER
SLUS165C – MARCH 1999 - REVISED JANUARY 2002
electrical characteristics, these specifications apply for T
A
= –55°C to 125°C for UC1907, –40°C to
85°C for UC2907, and 0°C to 70°C for UC3907, V
IN
= 15 V, T
A
= T
J
(unless otherwise stated )
PARAMETER
Voltage Amp Section
COMP = 1 V,
Input oltage
Inp t voltage
Line regulation
Load regulation
Long term stability
Total output variation
Input adjust range
Input bias current
Open loop gain
Unity gain bandwidth
Output sink current
Output source current
VOUT high
VOUT low
Reference Section
Output oltage
O tp t voltage
Short circuit current
Ground Amp Section
Output voltage
Common mode variation
Load reg lation
regulation
Adjust Amp Section
Input offset voltage
Input bias current
Open loop gain
Unity gain bandwidth
Transconductance
Output sink current
Output source current
VOUT high
VOUT low
Common mode rejection ratio
Output gain to V/A
1.5 V
≤
ADJ OUT
≤
2.25 V
TA = 25°C,
COUT =1
µF
See Note 2
IOUT = –10
µA
to 10
µA,
VOUT = 1.5 V
VID = 0.0 V,
VID = 250 mV,
VID = 250 mV,
VID = 0.0 V,
ADJ OUT = 1.5 V
ADJ OUT = 1.5 V
IOUT = – 50 mA
IOUT = 50 mA
ADJ OUT = 1.5 V, VCM = 0.0 V
40
–2
65
500
1.7
55
110
2.20
70
50
57
64
3
135
200
2.70
0.75
4.5
225
350
2.90
1.15
50
60
mV
µA
dB
Hz
ms
µA
µA
V
V
dB
mV/V
(–) SENSE from 0.0 V to 2 V
IL = 0.0 mA to 20 mA,
IL = 0.0 mA to 20 mA,
TA = 25°C
over temp
200
250
300
5
10
15
mV
mV
mV
mV
TA = 25°C
Over operating temp
VREF = 0.0 V
1.970
1.955
–15
2.000
2.000
–30
2.030
2.045
–60
V
V
mA
COMP = 0.75 V to 1.5 V
TA = 25°C
(+) SENSE = 2.2 V,
(+) SENSE = 1.8 V,
(+) SENSE = 1.8 V,
(+) SENSE = 2.2 V,
See Note 2
COMP = 1 V
COMP = 1 V
IL = –400
µΑ
IL = 1 mA
COMP = 1 V,
TA = 25°C
over temp
1.975
1.960
2.000
2.000
2.025
2.040
15
10
5
1.960
85
–1
65
700
6
400
1.85
15
600
2
0.15
0.40
100
25
2.040
115
mV
µA
dB
kHz
mA
µA
V
V
V
V
mV
mV
mV
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VIN = 4.5 V to 35 V
IL reference = 0.0 mA to –10 mA
TA = 125°C,
Line, load, temp
1000hrs See Note 2
ADJ OUT from max high to max low
VCM = 0.0 to 10 V
VOUT ADJ OUT = 1.5 V to 2 V,
∆(+)
SENSE/
∆ADJ
OUT
NOTE 1: Unless otherwise specified all voltages are with respect to (–) SENSE. Currents are positive into, negative out of the specified terminal.
NOTE 2: Ensured by design. Not production tested.
www.ti.com
3
UC1907, UC2907, UC3907
LOAD SHARE CONTROLLER
SLUS165C – MARCH 1999 - REVISED JANUARY 2002
electrical characteristics, these specifications apply for T
A
= –55°C to 125°C for UC1907, –40°C to
85°C for UC2907, and 0°C to 70°C for UC3907, V
IN
= 15 V, T
A
= T
J
(unless otherwise stated )
PARAMETER
Current Amp Section
Gain
Output oltage
O tp t voltage
Input offset change with common mode
input
VOUT high
VOUT low
Power supply rejection ratio
Slew rate
Drive Amp Section RSET = 500
Ω
to Artificial GND, Opto Drive = 15 V
Voltage gain
ISET VOUT high
ISET VOUT low
Opto out voltage range
Zero current input threshold
Buffer Amp Section
Input offset voltage
Output off impedance
Output source current
Common mode rejection ratio
Power supply rejection ratio
Under Voltage Lockout Section
Startup threshold
Threshold hysteresis
Status Indicate Section
VOUT low
Output leakage
Total Stand by Current Section
Startup current
Operating current
VIN = UVLO – 0.2 V
VIN = 35 V
3
6
5
10
mA
mA
ADJ OUT = current share bus
ADJ OUT = 1 V,
VOUT = 35 V
0.2
0.1
0.5
5
V
µA
3.7
200
4.4
V
mV
Input = 1 V
Input = 1 V,
Input = 1 V,
VCM = 0.3 V to 10 V
VIN = 4.5 V to 35 V
output = 1.5 V to 2 V
output = 0.5 V
5
6
70
70
10
15
5
20
mV
kΩ
mA
dB
dB
COMP = 0.5 V to 1 V
(+) SENSE = 2.2 V
(+) SENSE = 1.8 V
4
1.55
1.65
2.3
3.8
2.5
4.1
270
2.6
4.4
300
35
1.75
V/V
V
mV
V
V
VCM = 0.0 V,
VC/S (+) = VC/S (–) = 0.0 V,
VC/S (+) = VC/S (–) = 0.0 V,
VCM = 0 V to 13 V
VID = 1 V
VID = – 1 V,
VIN = 4.5 V to 35 V,
VID = 50 mV to 100 mV
TA = 25°C
over temp
19.2
210
180
19.6
250
250
20.1
290
330
600
10
IL = 1 mA
VCM = 0.0 V
60
0.4
14.5
350
450
V/V
mV
mV
µV/V
V
mV
dB
V/µs
TEST CONDITIONS
MIN
TYP
MAX
UNITS
NOTE 1: Unless otherwise specified all voltages are with respect to (–) SENSE. Currents are positive into, negative out of the specified terminal.
NOTE 2: Ensured by design. Not production tested.
4
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