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5962-8606301XX

产品描述UVPROM, 32KX8, 200ns, CMOS, CDIP28, CERAMIC, DIP-28
产品类别存储    存储   
文件大小213KB,共21页
制造商VLSI
官网地址http://www.vlsi.fi/
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5962-8606301XX概述

UVPROM, 32KX8, 200ns, CMOS, CDIP28, CERAMIC, DIP-28

5962-8606301XX规格参数

参数名称属性值
包装说明CERAMIC, DIP-28
Reach Compliance Codeunknown
最长访问时间200 ns
JESD-30 代码R-GDIP-T28
内存密度262144 bit
内存集成电路类型UVPROM
内存宽度8
功能数量1
端子数量28
字数32768 words
字数代码32000
工作模式ASYNCHRONOUS
最高工作温度125 °C
最低工作温度-55 °C
组织32KX8
封装主体材料CERAMIC, GLASS-SEALED
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
并行/串行PARALLEL
认证状态Not Qualified
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子形式THROUGH-HOLE
端子位置DUAL
Base Number Matches1

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REVISIONS
LTR
A
DESCRIPTION
Add three vendors, 18324, 1FN41, and 66579. Add device types 04, 05,
06, and 07. Add margin test method C. Update vendor's PIN. Change
code indent. no. to 67268. Editorial changes throughout.
Add device type 08 with vendors CAGE 1FN41 and CAGE 66579.
Added time temperature regression equation for unbiased bake.
Removed vendor CAGE 66302. Made technical changes to table I, 4.2
back end margin test method step 3, 4.3.1 step C, table II, and table III.
Editorial changes throughout. Added vendor's PIN from XMB/883 to
either LM/883 for appropriate device types. Deleted the top CE
waveform on figure 6. This was incorrect for this device.
Added vendor CAGE 34335 to the drawing as a source of supply for
device types 01 through 07. Add vendor CAGE number 66579 to device
types 01 through 04, also add vendor CAGE number 01295 to devices
04XX and 05XX. Add test condition A to 4.2 and 4.3.2. Add margin test
method E for vendor CAGE number 34335. Change to vendor similar
PIN for vendor CAGE numbers 1FN41 and 66579. Change to figure 3,
margin test method C for vendor CAGE 01295 and change to
programming waveforms. Change to 4.5. Editorial changes throughout.
Add case outline Z for vendor CAGE number 1FN41.
Changes in accordance with NOR 5962-R130-92.
Add case outline U. Add device types 09 and 10. Remove vendor
27014 from drawing. Editorial changes throughout.
Changes in accordance with NOR 5962-R118-94.
Updated boilerplate. Added device types 11-21. Removed vendors
1FN41, 18324, 34335, and 61394 from drawing. Added vendor 65786 to
drawing. Removed margin test methods from drawing.
Boilerplate update, part of 5 year review. ksr
DATE (YR-MO-DA)
87-12-17
APPROVED
M. A. Frye
B
89-01-01
M. A. Frye
C
90-12-05
M. A. Frye
D
E
F
G
92-01-30
93-10-15
94-02-16
97-06-11
M. A. Frye
M. A. Frye
M. A. Frye
Raymond Monnin
H
06-07-17
Raymond Monnin
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
CURRENT CAGE CODE IS 67268
REV
SHEET
REV
SHEET
OF SHEETS
PMIC N/A
REV STATUS
H
15
H
16
REV
SHEET
PREPARED BY
H
1
H
2
H
3
H
4
H
5
H
6
H
7
H
8
H
9
H
10
H
11
H
12
H
13
H
14
James E. Jamison
CHECKED BY
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
Charles Reusing
APPROVED BY
http://www.dscc.dla.mil
Michael A. Frye
DRAWING APPROVAL DATE
87-02-12
REVISION LEVEL
H
MICROCIRCUIT, MEMORY,
DIGITAL, CMOS, 262,144-BIT
(32K x 8) UV ERASABLE PROM,
MONOLITHIC SILICON
SIZE
CAGE CODE
A
SHEET
14933
1 OF
16
5962-86063
DSCC FORM 2233
APR 97
5962-E528-06

 
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