®
EQCO125X40 Family
12.5 Gbps Asymmetric Equalizer/Driver/Repeater Product Brief
Features
• Equalizer for up to 40 m of coaxial cable at
12.5 Gbps or 130 m at 1.25 Gbps over a single
Belden 1694A coax cable
• Same chip used at Device (Camera) and Host
(Frame Grabber) for asymmetric full-duplex
communication
• Lower Cost version EQCO125T40 for Device
(Camera) side only
• Cable types supported are 75
coax, 50
coax,
and 100
STP (Shielded Twisted Pair)
• Simultaneous signaling over a single cable:
-
Up to 12.5 Gbps downlink
-
21 or 42 Mbps uplink
-
Power over Coax
• Can also be used as a stand-alone cable repeater
with simultaneous power, downlink and uplink
over a single cable
• Integrated termination resistors for differential
signaling
• CDR (Clock-Data Recovery) restores signal
integrity in both directions
• Both Uplink and Downlink include equalizer, CDR
and Cable driver (see
Figure 1-2)
• Reference-clock free operation (no crystal or
clock needed)
• Low power consumption / single supply @ 1.25 V
• 16-pin, 0.65 mm pin pitch, 4 mm QFN package
• Small PCB footprint for EQCO125X40 Family with
few off-chip components
• Industrial temperature range
• Pb-free and RoHS compliant
is received by an auto-adaptive equalizer that compen-
sates for higher-frequency losses in the preceding
channel. A reference-less Clock-Data Recovery (CDR)
subsequently self-adapts to the incoming bit-rate and
resets the jitter back to a low value for maintaining sig-
nal integrity. A cable driver launches this clean signal
back onto a cable or PCB trace pair. When placed in
series as a repeater, a signal can travel through several
EQCO125X40 Family devices to the destination. The
EQCO125X40 CDR restores signal integrity at each
link along the way.
The high-speed direction (or downlink) has a simulta-
neous
complementary
uplink,
operating
at
20.833 Mbps or 41.666 Mbps 8b/10b coded signaling.
This uplink also includes an equalizer, a reference-less
CDR and a cable driver, operating with a transparent
full-duplex and self-adaptive downlink.
The EQCO125X40 Family can be used as a CoaX-
Press transmitter inside a camera, as a CoaXPress
receiver inside a frame grabber and as a CoaXPress
repeater inside an active coax cable or link. It can also
be used as a generic high-speed signaling transport for
any 8b/10b application. In general it can be regarded as
an ideal means for using the high bit-rate ports on an
FPGA in real-world applications. This allows the high-
speed signal to get an increase in signal integrity along
its signaling path at strategic places: e.g. when chang-
ing the signaling nature from single-ended to differen-
tial or vice-versa, after long runs of cable, or recovering
the signal from skin effect and/or dielectric losses. The
CDR resets accumulated jitter due to small impedance
mismatches, non-ideal connectors, PCB-vias, etc., and
yields better signal integrity. This is also useful when
the signal chain includes an optical link.
Applications
• CoaXPress compliant systems, supports all
CoaXPress standards and speeds
• Links for high-definition Cameras
• Links between FPGAs
• High-speed capture cards over long cable lengths
• Machine Vision, Military, Aerospace, Medical,
Broadcast and Surveillance cameras, Intelligent
Traffic Systems
• When a single cable carrying power, video data
and camera control stream is needed
TYPICAL LINK PERFORMANCE
Typical maximum cable length
for Belden (m)
Bit-rate (Gbps) 1694A 4694R 4855R 4731R
1.25
2.5
3.125
5
6.25
10
12.5
130
110
100
65
55
40
40
137
118
108
70
60
45
45
75
64
60
40
33
24
24
210
180
160
105
90
65
65
General Description
The EQCO125X40 is a single chip (equalizer, driver,
reclocker) that repeats high-speed 8b/10b coded data
signals with a downstream bit-rate between 1.25 to
12.5 Gbps. From a cable or PCB trace pair, the signal
2020 Microchip Technology Inc.
JULY 2020
DS60001589D - page 1
EQCO125X40 Family
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of
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lications will be refined and enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications
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We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner
of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of
document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may
exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The
errata will specify the revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site;
http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature
number) you are using.
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Register on our web site at
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to receive the most current information on all of our products.
page 2 - DS60001589D
2020 Microchip Technology Inc.
EQCO125X40 Family
1.0
BASIC APPLICATION INFORMATION
The EQCO125X40 repeater chip is designed to simultaneously transmit and receive signals on a single cable or PCB
trace pair. In one direction an 8b/10b coded downlink signal is transmitted between 1.25 Gbps and 12.5 Gbps. In the
opposite direction a lower speed 8b/10b coded uplink signal is transmitted at 20.833 Mbps or 41.666 Mbps. The
EQCO125X40 has an integrated high-speed equalizer, reclocker and cable driver. The uplink channel also has an inte-
grated receiver, reclocker and driver.
Figure 1-1
illustrates a typical EQCO125X40 link set-up.
The downlink signal is transmitted with 600 mV transmit amplitude. As this signal is attenuated by the coax (or STP)
over distance, it is recovered by the equalizer and reclocker. The low-speed uplink is transmitted with a lower amplitude
of 130 mV to limit the crosstalk with the downlink channel.
The downlink channel is intended for NRZ 8b/10b data with bit-rates between 1.25 Gbps and 12.5 Gbps. CoaXPress
standard speeds of CXP-1 (1.25 Gbps), CXP-2 (2.5 Gbps), CXP-3 (3.125 Gbps), CXP-5 (5 Gbps), CXP-6 (6.25 Gbps),
CXP-10 (10 Gbps) and CXP-12 (12.5 Gbps) are all supported as well as all generic 8b/10b applications.
The low-speed uplink is intended for NRZ 8b/10b data with bit-rates between 20 Mbps and 42 Mbps with a single-ended
1.25V LVTTL input and output. CoaXPress standard speeds of 20.833 Mbps and 41.666 Mbps are supported.
On top of the downlink channel and the low-speed uplink, the system allows power transmission over the coax by using
external inductors. These external inductors give the communication channel a high-pass characteristic. The uplink
receiver inside the EQCO125X40 chip recovers the signal lost by this high-pass filter. Appropriate inductors should be
selected for correct operation of the link. Operation has only been tested with the inductor combination used in Micro-
chip’s reference design, even though other components might be suitable.
FIGURE 1-1:
TYPICAL EQCO125X40 LINK SET-UP
DC Power
Up to
12.5 Gbps
downlink
DC Power
Up to
12.5 Gbps
downlink
®
®
High
Definition
Camera
21/42
Mbps
uplink
EQCO
125X40
Coax
TP2
TP3
EQCO
125X40
21/42
Mbps
uplink
Frame
Store +
Camera
Control
FIGURE 1-2:
EQCO125X40 BLOCK DIAGRAM SHOWING ELECTRICAL CONNECTIONS
EQCO125X40
SDIp
SDIn
HF
Equalizer
+
HF
Reclocker
HF
Cable
driver
SDOp
SDOn
LF
Cable
Driver
TXLF
RXLF
CLKLF
LF
Output
Driver
LF
Reclocker
Noise
Gen.
TSI
LF
Receiver
2020 Microchip Technology Inc.
DS60001589D - page 3
EQCO125X40 Family
PACKAGING INFORMATION
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
Note:
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
NOTE 1
NOTE 1
1
1
2
2
N
N
D
A
B
E
E
(DATUM B)
(DATUM A)
(DATUM B)
(DATUM A)
2X
0.20 C
2X
0.20 C
2X
0.20 C
2X
0.20 C
C
SEATING
C
PLANE
SEATING
PLANE
A
(A3)
TOP VIEW
TOP VIEW
0.10 C
0.10 C
A1
A1
A
(A3) 0.10
0.10
(16X K)
(16X K)
SIDE VIEW
C A B
SIDE VIEW
C A B
D2
D2
16X
16X
0.08 C
0.08 C
0.10
0.10
E2
e
2
e
2
C A B
C A B
2
2
1
1
E2
16X L
N
N
16X L
16X b
16X b 0.10
0.05
0.10
e
e
BOTTOM VIEW
0.05
C
Microchip Technology Drawing
BOTTOM VIEW
C A B
CCA B
C04-259B Sheet 1 of 2
Microchip Technology Drawing C04-259B Sheet 1 of 2
page 4 - DS60001589D
2020 Microchip Technology Inc.
EQCO125X40 Family
16-Lead Plastic Quad Flat, No Lead Package (8E) --4x4x0.9 mm Body [QFN]
16-Lead Plastic Quad Flat, No Lead Package (8E) 4x4x0.9 mm Body [QFN]
Note:
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
http://www.microchip.com/packaging
Notes:
Notes:
1. Pin 11visual index feature may vary, but must be located within the hatched area.
1. Pin visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-259B Sheet 22of 22
Microchip Technology Drawing C04-259B Sheet of
Units
Units
Dimension Limits
Dimension Limits
Number of Pins
N
Number of Pins
N
ee
Pitch
Pitch
Overall Height
A
Overall Height
A
Standoff
A1
Standoff
A1
A3
Terminal Thickness
A3
Terminal Thickness
Overall Width
E
Overall Width
E
E2
Exposed Pad Width
E2
Exposed Pad Width
Overall Length
D
Overall Length
D
D2
Exposed Pad Length
D2
Exposed Pad Length
Terminal Width
bb
Terminal Width
Terminal Length
LL
Terminal Length
K
Terminal-to-Exposed-Pad
K
Terminal-to-Exposed-Pad
MIN
MIN
0.80
0.80
0.00
0.00
1.95
1.95
1.95
1.95
0.25
0.25
0.45
0.45
MILLIMETERS
MILLIMETERS
NOM
NOM
16
16
0.65 BSC
0.65 BSC
0.87
0.87
0.02
0.02
0.20 REF
0.20 REF
4.00 BSC
4.00 BSC
2.05
2.05
4.00 BSC
4.00 BSC
2.05
2.05
0.30
0.30
0.55
0.55
0.425 REF
0.425 REF
MAX
MAX
0.95
0.95
0.05
0.05
2.15
2.15
2.15
2.15
0.35
0.35
0.65
0.65
2020 Microchip Technology Inc.
DS60001589D - page 5
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