Highly Integrated Secondary-
Side Adaptive USB Type-C
Charging Controller with
USB-PD with SR Embedded
FAN6390MPX
The FAN6390MPX is a highly integrated, secondary−side power
adaptor controller supporting USB Type−C and USB Power Delivery
2.0/3.0. It includes a fully autonomous USB PD state machine which
is fully compliant with the latest USB PD 3.0 specification,
minimizing design time and cost. Support for the latest Programmable
Power Supply (PPS) rules allows for control of voltages from 3.3 V to
21 V and current limits from 1 A to 3 A to meet a wide range of
applications and power levels.
To minimize BOM count, the FAN6390MPX includes internal
synchronous rectifier control, an NMOS gate driver for VBUS load
switch control, as well as Constant Voltage (CV) and Constant Current
(CC) control blocks with adjustable internal references. To ensure
proper operation of the adaptor, various protections are integrated into
the controller including output over−voltage protection, under−
voltage protection, external over−temperature protection via NTC,
internal over−temperature protection, CC over voltage protection and
Cable Fault Protection.
Features
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WQFN24
MLP, QUAD
CASE 510BE
PIN CONNECTIONS
VREF
IREF
CSN
NTC
SFB
NC
1
NC
LPC
GND
GND
LGATE
CC1
CC2
GATE
GND
NC
CP
VDD
VIN
CSP
GND
NC
BLD
NC
NC
•
•
•
•
•
•
•
•
•
•
•
•
USB Type−C Rev 1.3 Compatible
Support 60 W Output Profile
(PDO: 5 V, 9 V, 15 V, 20 V. APDO: 9 V, 15 V, 20 V)
Constant Voltage (CV) and Constant Current (CC) Regulation with
Two Operational Amplifiers of Open−Drain Type for Dual−Loop
CV/CC Control
Charge Pump Circuit to Enhance SR Driving Voltage for High
Efficiency
Small Current Sensing Resistor (5 mW) for High Efficiency
N−Channel Back to Back MOSFET Control as a Load Switch
Built−in Output Capacitor Bleeding Function for Fast Discharging
Precise Voltage & Current Control for Minimum Step Size via 10−bit
DAC’s
10−bit ADC for Monitoring Voltage, Current and Temperature
Auto Re−start Protection Mode Option to Disable Load Switch for 2
seconds
Support Protections; Output Over−Voltage Protection, Under−Voltage
Protection, External Over Temperature Protection via NTC, Internal
Over Temperature Protection, Cable Fault Protection, and CC Lines
Over Voltage Protection
(Bottom View)
MARKING DIAGRAM
1
6390
FFFB
ALYWG
G
6390FFFB = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Typical Applications
•
Battery Chargers for Smart Phones, Feature Phones, and Tablet PCs
•
AC−DC Adapters for Portable Devices that Require CV/CC Control
1
©
Semiconductor Components Industries, LLC, 2019
November, 2019
−
Rev. 1
Publication Order Number:
FAN6390/D
FAN6390MPX
Transformer
C
OUT
R
SENSE
1
4
AC IN
V
BUS
USB Type
−
C
GND
GND
RX1+
RX1−
V
BUS
SBU2
D−
D+
CC2
V
BUS
TX2−
TX2+
GND
CC2
SR
MOSFET
R
BLD
TX1+
TX1−
V
BUS
V
BUS
CC1
D+
D−
SBU1
V
BUS
V
BUS
RX2−
RX2+
GND
FAN604
2
9
10
8
3
5
6
7
VIN
NC
NC
NC
LGATE
BLD
CSN
V
BUS
R
LPC−H
C
P
GATE
CC1
CP
CSP
Primary block
C
VDD
R
LPC−L
VDD
LPC
FAN6390
QFN4x4
VREF
IREF
V
BUS
NC
NC
GND
CC1
CC2
NTC
GND
GND
SFB
NC
Secondary block
Figure 1. Application Schematic
LGATE
VDD
VIN
Load switch
driver
VOUT
IOUT
EXT_TEMP
VDD
BLD Block
R
VIN−BLD
EN_BLD
V
IN.INT
ADC
V
CS.AMP
V
NTC.EXT
LGATE _EN Protection
VDD/LGATE Block
Protection Block
V
IN
−
ON
/ V
IN−OFF
Bleeding Function
Block
CC1
VREF
IREF
V
CVR
V
CCR
DAC
V
OVP
V
UVP
V
CDC
FAULT
RESET
LGATE_EN
Mode_change
Trigger_BLD
CC_state
CV_CC_mode
AC_OFF
Prt_states
Mode_change V
UVP
V
OVP
V
COMR
OVP/UVP/OCP
V
IN.INT
9R
V
CS.AMP
RESET
Type
−
& PD
C
State machines
K
UVP
K
OVP
K
CDC
Protection
Trigger_BLD
FAULT
VDD
I
NTC
Protection
CC2
Prt_states
Protections
processing
block
Cable fault
Prt_mode
FAULT
R
V
NTC.EXT
NTC
CC_gate
CV_CC_mode
CV_gate
CV/CC Control Block
IREF
VDD
X A
VCCR
Digital Block
CC_gate
LGATE_EN
Calculate
V
LPC−EN
V
LPC−EN
SR Block
Green Mode
SR GATE
Driver
S
Q
PWM
Block
R
V
LPC−TH
V
CT
CSN
CSP
V
CCR
CV_gate
VDD
LPC
VREF
Line
Detection
Function
Enable
i
CHR
i
DISCHR
V
RES
VIN
R
B LD−B LD
Protection
V
CVR
R
BLD
−
BU S
AC_OFF
EN_BLD
En_R
BLD−BUS
C
T
Ratio
LPC
(1μA/V)
Ratio
RES
(0.4μA/V)
Charge Pump block
CC_state
Cable Fault
Detection
Cable fault
CP
GATE
SFB
GND
GND
BLD
Figure 2. Block Diagram
ORDERING INFORMATION
Part Number
FAN6390MPXMPX
Operating Temperature Range
−40°C
to +125°C
Package
24−Lead, MLP, QUAD, JEDEC MO−220,
4 mm
×
4 mm, 0.5 mm Pitch, Single DAP
Packing Method
†
Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
FAN6390MPX
VREF
IREF
CSN
NTC
SFB
NC
1
NC
LPC
GND
GND
LGATE
CC1
CC2
GATE
GND
VDD
NC
CP
VIN
Description
No connection
SR control input signal. This pin is used to detect the voltage on the secondary winding during the on time
period of the primary MOSFET
Ground
Load switch gate drive signal. This pin is tied to the gate of the load switch
Configuration Channel 1. This pin is used to detect USB Type−C devices and communicate over USB PD
when applicable.
Configuration Channel 2. This pin is used to detect USB Type−C devices and communicate over USB PD
when applicable.
Output voltage (Input voltage to the FAN6390MPX). This pin is tied to the output of the adapter to monitor
its output voltage and supply internal bias.
No connection
Internal supply voltage. This pin is connected to an external capacitor.
Gate drive output. Totem−pole output to drive the external SR MOSFET.
SR gate charge pump
Ground
No connection
No connection
Bleeder pin. This pin is tied to VBUS after the load switch to discharge VBUS.
No connection
Ground
Current sensing amplifier positive terminal. Connect this pin directly to the positive end of the current sense
resistor with a short PCB trace.
Current sensing amplifier negative terminal. Connect this pin directly to the negative end of the current
sense resistor with a short PCB trace.
This pin is used for external temperature detection and protection
Secondary Feedback. Common output of the dual OTA open drain operation amplifiers. Typically an opto−
coupler is connected to this pin to provide feedback signal to the primary side PWM controller
Constant Current Amplifying Signal. The voltage level on this point is the amplified current sense signal. This
pin is tied to the internal CC loop amplifier’s non−inverting input terminal
Output Voltage Sensing Voltage. This pin is used for CV regulation, and it is tied to the internal CV loop am-
plifier non−inverting input terminal. It is tied to the output voltage resistor divider.
No connection
CSP
GND
NC
BLD
NC
NC
Figure 3. Pin Connections (Bottom View)
Table 1. PIN FUNCTION DESCRIPTION(MLP44)
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Pin Name
NC
LPC
GND
LGATE
CC1
CC2
VIN
NC
VDD
GATE
CP
GND
NC
NC
BLD
NC
GND
CSP
CSN
NTC
SFB
IREF
VREF
NC
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FAN6390MPX
Table 2. MAXIMUM RATINGS
(Notes 1, 2)
Rating
VIN Pin Input Voltage
SFB Pin Input Voltage
BLD Pin Input Voltage
LGATE Pin Input Voltage
VDD Pin Input Voltage
IREF Pin Input Voltage
VREF Pin Input Voltage
CSP Pin Input Voltage
CSN Pin Input Voltage
LPC pin Input Voltage
GATE Pin Input Voltage
NTC Pin Input Voltage
CC1 Pin Input Voltage
CC2 Pin Input Voltage
CP Pin Input Voltage
Power Dissipation (T
A
= 25°C)
Operating Junction Temperature
Storage Temperature Range
Lead Temperature, (Soldering, 10 Seconds)
Human Body Model, ANSI/ESDA/JEDEC JS−001−2012 (Note 3)
Charged Device Model, JESD22−C101 (Note 3)
Symbol
V
IN
V
SFB
V
BLD
V
LGATE
V
DD
V
IREF
V
VREF
V
CSP
V
CSN
V
LPC
V
GATE
V
NTC
V
CC1
V
CC2
V
CP
P
D
T
J
T
STG
TL
ESD
HBM
ESD
CDM
Value
−0.3
to 26
−0.3
to 26
−0.3
to 26
−0.3
to 31
−0.3
to 6
−0.3
to 6
−0.3
to 6
−0.3
to 6
−0.3
to 6
−0.3
to 6.5
−0.3
to 6.5
−0.3
to 6
−0.3
to 6
−0.3
to 6
−0.3
to 6.5
0.8644
−40
to 150
−40
to 150
260
2
0.5
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
W
°C
°C
°C
kV
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. All voltage values, except differential voltages, are given with respect to the GND pin.
2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
3. Meets JEDEC standards JS−001−2012 and JESD 22−C101.
Table 3. THERMAL CHARACTERISTICS
(Note 4)
Rating
Thermal Characteristics,
Thermal Resistance, Junction−to−Air
Thermal Reference, Junction−to−Top
4. T
A
= 25°C unless otherwise specified.
Symbol
R
qJA
R
qJT
Value
122
5
Unit
°C/W
Table 4. RECOMMENDED OPERATING RANGES
Rating
Input Voltage
Output Current
Adjustable Output Voltage (Adjustable Version Only)
Ambient Temperature
Symbol
V
in
I
out
V
out
T
A
Min
Max
20
5
20
80
Unit
V
A
V
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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FAN6390MPX
Table 5. ELECTRICAL CHARACTERISTICS
V
IN
= 5 V, LPC = 1.25 V, LPC width = 2
ms
at T
J
=
−40~125°C,
F
LPC
= 100 kHz, unless otherwise specified.
Parameter
VDD SECTION
Turn−On Valid Threshold Voltage
VIN Operating Voltage at 20V
VDD Source Current
VIN SECTION
Continuous Operating Voltage
(Note 5)
Operating Supply Current at 5 V
Operating Supply Current at 20 V
(Note 5)
Turn−On Threshold Voltage
Turn−Off Threshold Voltage
V
IN
= 5 V, V
CS
=
−25
mV, Rcs = 5 mW
V
IN
= 20 V, V
CS
=
−25
mV, Rcs = 5 mW
V
IN
Increases
V
IN
Decreases after V
IN
= V
IN−ON
V
IN−OP
I
IN−OP−5V
I
IN−OP−20V
V
IN−ON
V
IN−OFF
I
IN−Green
2.9
2.805
8
3.2
2.875
3.4
3.005
1.3
22.5
10
V
mA
mA
V
V
mA
V
IN
= 20 V, I
VDD
= 0 mA
V
IN
= 3.3 V, V
DD
= 2.9 V
V
DD−valid
V
DD
I
DD
2.6
4.750
10
5.125
5.500
V
V
mA
Test Conditions
Symbol
Min
Typ
Max
Unit
Green Mode Operating Supply Current V
IN
= 5.2 V (default), V
CS
= 0 mV
excluding I
P−CC1
and I
P−CC2
VIN−UVP SECTION
Ratio V
IN
Under−Voltage−Protection to Whole output mode, V
CS
= 0 mV
V
IN
CC Mode UVP Debounce Time
UVP Blanking Time during Mode
Change from Lower Vout to Higher
Vout
VIN−OVP SECTION
Ratio V
IN
Over−Voltage−Protection to
V
IN
V
IN
Maximum
Over−Voltage−Protection
OVP Debounce Time
OVP Blanking Time during Mode
Change from Higher Vout to Lower
Vout (Note 5)
OVP Blanking Time during Mode
Change from Higher Vout to Lower
Vout (Note 5)
OVP Blanking Time during Mode
Change from Higher Vout to Lower
Vout (Note 5)
OVP Blanking Time during Mode
Change from Higher Vout to Lower
Vout
Vstep
v
0.5 V, Vbus
w
13
Disabling OVP & SR Gate.
Vstep
v
0.5 V, Vbus < 13
Disabling OVP & SR Gate.
Disabling OVP & SR Gate.
Vstep > 0.5 V, Vbus
w
13
Disabling OVP & SR Gate.
Vstep > 0.5 V, Vbus < 13
Whole output mode, V
CS
= 0 mV
Whenever does mode change from
lower Vout to higher Vout
K
IN−UVP
t
D−VIN−UVP
t
BNK−UVP
65
45
160
70
60
200
75
75
240
%
ms
ms
K
IN−OVP
V
IN−OVP−MAX
t
D−OVP
t
BNK−OVP
116.0
23.5
19
121.5
24.5
31
7
127.0
25.5
43
%
V
ms
ms
t
BNK−OVP
19
ms
t
BNK−OVP
56
ms
t
BNK−OVP
200
ms
CONSTANT CURRENT SENSING SECTION (100% CC)
Current−Sense Amplifier Gain
(Note 5)
Current threshold on sensing resistor
between CSP and CSN at
I
OUT.CC
= 1.00 A
R
CS
= 5 mW
VIN = 3.3 V, 5 V, 20 V
A
V−CCR
I
CS−1.00A
0.86
40
1.00
1.14
V/V
A
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Guaranteed by Design
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