USB7206
6-Port USB 3.2 Gen 2 Controller Hub
Highlights
• 6-Port USB Smart Hub with:
-
®
Five Standard USB 3.2 Gen 2 downstream ports
- One Standard USB 2.0 downstream port
• Supports battery charging of most popular battery
powered devices on all ports
- USB-IF Battery Charging rev. 1.2 support
(DCP, CDP, SDP)
- Apple
®
portable product charger emulation
- Chinese YD/T 1591-2006/2009 charger emulation
- European Union universal mobile charger support
- Supports additional portable devices
- Internal Hub Feature Controller enables:
-USB to I
2
C/SPI/I
2
S/GPIO bridge endpoint support
-USB to internal hub register write and read
• USB Link Power Management (LPM) support
• Programming of firmware image to external SPI
memory device from USB host
• USB-IF Battery Charger revision 1.2 support on
downstream ports (DCP, CDP, SDP)
• Enhanced OEM configuration options available
through either OTP or external SPI memory
• Available in 100-pin (12mm x 12mm) VQFN
RoHS compliant package
• Commercial and industrial grade temperature
support
• On-chip Microcontroller
- manages I/Os, VBUS, and other signals
• 96kB RAM, 256kB ROM
• 8kB One-Time-Programmable (OTP) ROM
- Includes on-chip charge pump
• Configuration programming via OTP Memory, SPI
external memory, or SMBus
• FlexConnect
- The roles of the upstream and all downstream
ports are reversible on command
Target Applications
•
•
•
•
•
Standalone USB Hubs
Laptop Docks
PC Motherboards
PC Monitor Docks
Multi-function USB 3.2 Gen 2 Peripherals
• USB Bridging
• PortSwap
- USB to I
2
C, SPI, I
2
S, and GPIO
- Configurable USB 2.0 differential pair signal swap
• PHYBoost
- Programmable USB transceiver drive strength for
recovering signal integrity
Key Benefits
• USB 3.2 Gen 2 compliant 10 Gbps, 5 Gbps,
480 Mbps, 12 Mbps, and 1.5Mbps operation
- 5V tolerant USB 2.0 pins
- 1.21V tolerant USB 3.2 Gen 2 pins
- Integrated termination and pull-up/down resistors
-
• VariSense
- Programmable USB receive sensitivity
• PortSplit
- USB 2.0 and USB 3.2 Gen 2 port operation can be
split for custom applications using embedded USB
3.x devices in parallel with USB 2.0 devices
• Compatible with Microsoft Windows 10, 8, 7, XP,
Apple OS X 10.4+, and Linux hub drivers
• Optimized for low-power operation and low ther-
mal dissipation
• 100-pin VQFN package (12mm x 12mm)
2018 - 2020 Microchip Technology Inc.
DS00002875C-page 1
USB7206
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of
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http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner
of any page. The last character of the literature number is the version number, (e.g., DS30000A is version A of doc-
ument DS30000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may
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To determine if an errata sheet exists for a particular device, please check with one of the following:
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DS00002875C-page 2
2018 - 2020 Microchip Technology Inc.
USB7206
1.0
1.1
PREFACE
General Terms
GENERAL TERMS
Description
Analog-to-Digital Converter
8 bits
Communication Device Class
Control and Status Registers
Downstream Facing Port
32 bits
End of Packet
Endpoint
First In First Out buffer
Full-Speed
Finite State Machine
General Purpose I/O
Hi-Speed
High Speed Over Sampling
The Hub Feature Controller, sometimes called a Hub Controller for short is the internal
processor used to enable the unique features of the USB Controller Hub. This is not to
be confused with the USB Hub Controller that is used to communicate the hub status
back to the Host during a USB session.
Inter-Integrated Circuit
Low-Speed
Least Significant Bit
Least Significant Byte
Most Significant Bit
Most Significant Byte
Not Applicable
No Connect
One Time Programmable
Printed Circuit Board
Physical Coding Sublayer
Physical Layer
Phase Lock Loop
Refers to a reserved bit field or address. Unless otherwise noted, reserved bits must
always be zero for write operations. Unless otherwise noted, values are not guaran-
teed when reading reserved bits. Unless otherwise noted, do not read or write to
reserved addresses.
Software Development Kit
System Management Bus
Upstream Facing Port
Universally Unique IDentifier
16 bits
TABLE 1-1:
Term
ADC
Byte
CDC
CSR
DFP
DWORD
EOP
EP
FIFO
FS
FSM
GPIO
HS
HSOS
Hub Feature Controller
I
2
C
LS
lsb
LSB
msb
MSB
N/A
NC
OTP
PCB
PCS
PHY
PLL
RESERVED
SDK
SMBus
UFP
UUID
WORD
2018 - 2020 Microchip Technology Inc.
DS00002875C-page 3
USB7206
1.2
Buffer Types
BUFFER TYPES
Description
Input.
Input with Schmitt trigger.
Output buffer with 12 mA sink and 12 mA source.
Open-drain output with 12 mA sink
50 μA (typical) internal pull-up. Unless otherwise noted in the pin description, internal pull-
ups are always enabled.
Internal pull-up resistors prevent unconnected inputs from floating. Do not rely on internal
resistors to drive signals external to the device. When connected to a load that must be
pulled high, an external resistor must be added.
PD
50 μA (typical) internal pull-down. Unless otherwise noted in the pin description, internal
pull-downs are always enabled.
Internal pull-down resistors prevent unconnected inputs from floating. Do not rely on
internal resistors to drive signals external to the device. When connected to a load that
must be pulled low, an external resistor must be added.
ICLK
OCLK
I/O-U
I-R
A
AIO
P
Crystal oscillator input pin
Crystal oscillator output pin
Analog input/output defined in USB specification.
RBIAS.
Analog.
Analog bidirectional.
Power pin.
TABLE 1-2:
Buffer Type
I
IS
O12
OD12
PU
DS00002875C-page 4
2018 - 2020 Microchip Technology Inc.
USB7206
1.3
Pin Reset States
The pin reset state definitions are detailed in
Table 1-3.
Refer to
Section 3.1, Pin Assignments
for details on individual
pin reset states.
TABLE 1-3:
Symbol
AI
AIO
AO
PD
PU
Y
Z
PU
PD
PIN RESET STATE LEGEND
Description
Analog input
Analog input/output
Analog output
Hardware enables pull-down
Hardware enables pull-up
Hardware enables function
Hardware disables output driver (high impedance)
Hardware enables internal pull-up
Hardware enables internal pull-down
1.4
1.
2.
3.
4.
5.
Reference Documents
Universal Serial Bus Revision 3.2 Specification,
http://www.usb.org
Battery Charging Specification,
Revision 1.2, Dec. 07, 2010, http://www.usb.org
I
2
C-Bus Specification,
Version 1.1, http://www.nxp.com/documents/user_manual/UM10204.pdf
I
2
S-Bus Specification,
http://www.sparkfun.com/datasheets/BreakoutBoards/I2SBUS.pdf
System Management Bus Specification,
Version 1.0, http://smbus.org/specs
Note:
Additional USB7206 resources can be found on the Microchip USB7206 product page at www.micro-
chip.com/USB7206.
2018 - 2020 Microchip Technology Inc.
DS00002875C-page 5
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