DATASHEET
HI-546/883, HI-547/883
Single 16/Differential 8-Channel CMOS Analog Multiplexers with Active
Overvoltage Protection
The HI-546/883 and HI-547/883 are analog multiplexers with
active overvoltage protection and guaranteed r
ON
matching.
Analog input levels may greatly exceed either power supply
without damaging the device or disturbing the signal path of
other channels. Active protection circuitry assures that signal
fidelity is maintained even under fault conditions that would
destroy other multiplexers.
Analog inputs can withstand constant 70V
P-P
levels with ±15V
supplies. Digital inputs will also sustain continuous faults up to
4V greater than either supply. In addition, signal sources are
protected from short circuiting should multiplexer supply loss
occur. Each input presents 1kΩ of resistance under this
condition. These features make the HI-546/883 and
HI-547/883 ideal for use in systems where the analog inputs
originate from external equipment or separately powered
circuitry. Both devices are fabricated with 44V dielectrically
isolated CMOS technology. The HI-546/883 is a single
16-channel, and the HI-547/883 is an 8-channel differential
version. If input overvoltage protection is not needed, the
HI-506/883 and HI-507/883 multiplexers are recommended.
For further information see application note
AN520.
FN7994
Rev 1.00
Nov 19, 2014
Features
• This circuit is processed in accordance to MIL-STD-883 and
is fully conformant under the provisions of Paragraph 1.2.1.
• No channel interaction during overvoltage
• Guaranteed r
ON
matching
• 44V maximum power supply
• Break-before-make switching
• Analog signal range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Access time (max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0µs
• Power dissipation (max) . . . . . . . . . . . . . . . . . . . . . . . . 45mW
Applications
• Data acquisition systems
• Control systems
• Telemetry
Ordering Information
PART #
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
PKG.
DWG. #
HI1-0546/883 HI1-546/883
-55 to +125 28 Ld CerDIP F28.6
J28.A
HI4-0546/883 HI4-0546 /883 -55 to +125 28 Ld CLCC
HI1-0547/883 HI1-547/883
-55 to +125 28 Ld CerDIP F28.6
J28.A
HI4-0547/883 HI4-0547 /883 -55 to +125 28 Ld CLCC
FN7994 Rev 1.00
Nov 19, 2014
Page 1 of 15
HI-546/883, HI-547/883
Pin Configurations
HI-546/883
(28 LD CERDIP)
TOP VIEW
+V
SUPPLY
1
28 OUT
27 -V
SUPPLY
26 IN 8
25 IN 7
24 IN 6
23 IN 5
22 IN 4
21 IN 3
20 IN 2
19 IN 1
18 ENABLE
17 ADDRESS A
0
16 ADDRESS A
1
15 ADDRESS A
2
+V
SUPPLY
1
HI-547/883
(28 LD CERDIP)
TOP VIEW
28 OUT A
27 -V
SUPPLY
26 IN 8A
25 IN 7A
24 IN 6A
23 IN 5A
22 IN 4A
21 IN 3A
20 IN 2A
19 IN 1A
18 ENABLE
17 ADDRESS A
0
16 ADDRESS A
1
15 ADDRESS A
2
NC 2
NC 3
IN 16 4
IN 15 5
IN 14 6
IN 13 7
IN 12 8
IN 11
9
OUT B 2
NC 3
IN 8B 4
IN 7B 5
IN 6B 6
IN 5B 7
IN 4B 8
IN 3B 9
IN 2B 10
IN 1B 11
GND 12
V
REF
13
NC 14
IN 10 10
IN 9 11
GND 12
V
REF
13
ADDRESS A
3
14
HI-546/883
(28 LD CLCC)
TOP VIEW
+V
SUPPLY
-V
SUPPLY
HI-547/883
(28 LD CLCC)
TOP VIEW
+V
SUPPLY
-V
SUPPLY
27
OUT B
OUT A
IN 8B
IN 16
OUT
IN 8
NC
NC
4
3
2
1
28
27
26
4
3
2
1
28
IN 15 5
IN 14 6
IN 13 7
IN 12 8
IN 11 9
IN 10 10
IN 9 11
25 IN 7
24 IN 6
23 IN 5
22 IN 4
21 IN 3
20 IN 2
19 IN 1
IN 7B 5
IN 6B 6
IN 5B 7
IN 4B 8
IN 3B 9
IN 2B 10
IN 1B 11
IN 8A
26
NC
25 IN 7A
24 IN 6A
23 IN 5A
22 IN 4A
21 IN 3A
20 IN 2A
19 IN 1A
12
GND
13
V
REF
14
A
3
15
A
2
16
A
1
17
A
0
18
ENABLE
12
GND
13
V
REF
14
NC
15
A
2
16
A
1
17
A
0
18
ENABLE
FN7994 Rev 1.00
Nov 19, 2014
Page 2 of 15
HI-546/883, HI-547/883
Functional Diagrams
HI-546/883
1k
IN 1
IN 2
1k
DECODER/
DRIVER
1k
IN 16
OUT
TRUTH TABLE HI-546/883
A
3
X
L
L
L
L
L
A
2
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
A
1
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A
0
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
EN
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
“ON” CHANNEL
None
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OVERVOLTAGE
CLAMP AND
SIGNAL
ISOLATION
† DIGITAL INPUT
PROTECTION
5V
REF
LEVEL
SHIFT
L
L
†
†
†
†
†
L
H
V
REF
A
0
A
1
A
2
A
3
EN
H
H
H
H
H
H
H
HI-547/883
1k
IN 1A
1k
IN 8A
IN 1B
IN 8B
1k
1k
DECODER/
DRIVER
OUT B
OUT A
TRUTH TABLE HI-547/883
A
2
X
L
L
L
L
A
1
X
L
L
H
H
L
L
H
H
A
0
X
L
H
L
H
L
H
L
H
EN
L
H
H
H
H
H
H
H
H
“ON” CHANNEL PAIR
None
1
2
3
4
5
6
7
8
OVERVOLTAGE
CLAMP AND
SIGNAL
ISOLATION
† DIGITAL INPUT
PROTECTION
5V
REF
LEVEL
SHIFT
H
H
H
†
†
†
†
H
V
REF
A
0
A
1
A
2
EN
FN7994 Rev 1.00
Nov 19, 2014
Page 3 of 15
HI-546/883, HI-547/883
Absolute Maximum Ratings
Voltage Between Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
+V
SUPPLY
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22V
-V
SUPPLY
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Analog Input Voltage, +V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . +V
SUPPLY
+20V
Analog Input Voltage,
-V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . -V
SUPPLY
-20V
Digital Input Voltage, +V
EN
, +V
A
. . . . . . . . . . . . . . . . . . . . . . . +V
SUPPLY
+4V
Digital Input Voltage,
- V
EN
, -V
A
. . . . . . . . . . . . . . . . . . . . . . . . . -V
SUPPLY
+4V
or 20mA, whichever occurs first
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, S or D (Pulsed at 1ms, 10% Duty Cycle Max) . . . . . . . . 40mA
ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
≤2000V
Thermal Information
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
CerDIP Package (Notes
1, 2).
. . . . . . . . . . .
50
18
CLCC Package (Notes
1, 2)
. . . . . . . . . . . . .
81
20
Power Dissipation
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.0W
CLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.23W
Power Dissipation Derating Factor (Above +75°C)
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20.0mW/°C
CLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3mW/°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . . . . . . . +275°C
Recommended Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Operating Supply Voltage (±V
SUPPLY
) . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
Analog Input Voltage (V
S
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
SUPPLY
Logic Low Level (V
AL
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 0.8V
Logic High Level (V
AH
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4V to
V
SUPPLY
Max RMS Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
1.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
2. For
JC
, the "case temp" location is the center of the ceramic on the package underside.
TABLE 1. D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at:
V
SUPPLY
=
15V, V
SUPPLY
=
15V,
V
EN
= 4.0V, V
REF
(Pin 13) = OPEN, unless otherwise specified.
D.C. PARAMETERS
Input Leakage Current
SYMBOL
I
IH
I
IL
Source “OFF”
Leakage Current
+I
S(OFF)
CONDITIONS
Measure inputs sequentially,
connect all unused inputs to GND
V
S
= +10V, V
D
= -10V, V
EN
= 0.8V,
All unused inputs = -10V
V
S
= -10V, V
D
= +10V, V
EN
= 0.8V,
All unused inputs = +10V
V
D
= +10V, V
EN
= 0.8V,
All unused inputs = -10V
HI-546/883
HI-547/883
-I
D(OFF)
V
D
= -10V, V
EN
= 0.8V,
All unused inputs = +10V
HI-546/883
HI-547/883
Channel “ON”
Leakage Current
+I
D(ON)
V
IN
(selected channels) = V
D
= +10V
V
S
= unused inputs = -10V
HI-546/883
HI-547/883
-I
D(ON)
V
IN
(selected channels) = V
D
= -10V
V
S
= unused inputs = +10V
HI-546/883
HI-547/883
GROUP A
SUBGROUPS
1, 2, 3
1, 2, 3
1
2, 3
1
2, 3
1
2, 3
2, 3
1
2, 3
2, 3
1
2, 3
2, 3
1
2, 3
2, 3
TEMPERATURE
(°C)
+25, +125, -55
+25, +125, -55
+25
+125, -55
+25
+125, -55
+25
+125, -55
+125, -55
+25
+25 to +125
+125, -55
+25
+125, -55
+125, -55
+25
+125, -55
+125, -55
MIN
-1.0
-1.0
-10
-50
-10
-50
-10
-300
-200
-10
-300
-200
-10
-300
-200
-10
-300
-200
MAX
1.0
1.0
10
50
10
50
10
300
200
10
300
200
10
300
200
10
300
200
UNITS
µA
µA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
-I
S(OFF)
Drain “OFF”
Leakage Current
+I
D(OFF)
FN7994 Rev 1.00
Nov 19, 2014
Page 4 of 15
HI-546/883, HI-547/883
TABLE 1. D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)
Device Tested at:
V
SUPPLY
=
15V, V
SUPPLY
=
15V,
V
EN
= 4.0V, V
REF
(Pin 13) = OPEN, unless otherwise specified.
D.C. PARAMETERS
SYMBOL
CONDITIONS
GROUP A
SUBGROUPS
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1
2, 3
-r
DS1
V
S
= -10V, I
D
= -100µA
1
2, 3
Logic Level Voltage
V
AL1
V
AH1
V
AL2
V
AH2
Difference in Switch “ON”
Resistance Between
Channels
+r
DS1
Notes 3, 4
Notes 3, 4
Note 5
Note 5
+r
DS1
MAX
–
+r
DS1
MIN
100
-------------------------------------------------------------------------------------------
-
+r
DS1
AVE
-r
DS1
MAX
–
-r
DS1
MIN
100
----------------------------------------------------------------------------------------
-
-r
DS1
AVE
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1
TEMPERATURE
(°C)
+25, +125, -55
+25, +125, -55
+25, +125, -55
+25, +125, -55
+25, +125, -55
+25, +125, -55
+25
+125, -55
+25
+125, -55
+25, +125, -55
+25, +125, -55
+25, +125, -55
+25, +125, -55
+25
--1.0
-
-
-
-
-
4.0
-
6.0
-
MIN
-2.0
-2.0
-
-1.0
MAX
2.0
2.0
2.0
-
2.0
-
1500
1800
1500
1800
0.8
-
0.8
-
7
UNITS
µA
µA
mA
mA
mA
mA
Ω
Ω
Ω
Ω
V
V
V
V
%
I
D
(OFF)
Overvoltage Protected,
V
S
= 33V, V
D
= 0V, V
EN
= 0.8V
Leakage Current Into the
Overvoltage V
S
applied at
≤25%
duty cycle
Drain Terminal of an “OFF”
V
S
= -33V, V
D
= 0V, V
EN
= 0.8V
Switch
V
S
applied at
≤25%
duty cycle
Positive Supply Current
Negative Supply Current
Standby Positive Supply
Current
Standby Negative Supply
Current
Switch “ON” Resistance
+I
-I
+I
SBY
-I
SBY
+r
DS1
V
A
= 0V, V
EN
= 4.0V
V
A
= 0V, V
EN
= 4.0V
V
A
= 0V, V
EN
= 0V
V
A
= 0V, V
EN
= 0V
V
S
= 10V, I
D
= 100µA
-r
DS1
1
+25
-
7
%
TABLE 2. A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at:
V
SUPPLY
=
15V, V
SUPPLY
=
15V,
V
EN
= 4.0V, V
REF
(Pin 13) = OPEN, unless otherwise specified.
PARAMETERS
Break-Before-Make Time
Delay
Propagation Delay Times:
Address Inputs to I/O
Channel Times
Enable to I/O
SYMBOL
t
D
t
A
CONDITIONS
R
L
= 1kΩ, C
L
= 12.5pF
R
L
= 10MΩ, C
L
= 14pF
GROUP A
SUBGROUPS
9
9
10, 11
t
ON(EN)
R
L
= 1kΩ, C
L
= 12.5pF
9
10, 11
t
OFF(EN)
R
L
= 1kΩ, C
L
= 12.5pF
9
10, 11
TEMPERATURE
(°C)
+25
+25
+125, -55
+25
+125, -55
+25
+125, -55
MIN
25
500
1000
500
1000
500
1000
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at:
V
SUPPLY
=
15V, V
SUPPLY
=
15V,
V
EN
= 4.0V, V
REF
(Pin 13) = OPEN, unless otherwise specified.
PARAMETERS
Capacitance Address Input
Capacitance Output Switch
SYMBOL
C
A
C
OS
CONDITIONS
V+ = V- = 0V, f = 1MHz
V+ = V- = 0V
f = 1MHz
HI-546/883
HI-547/883
NOTE
6
6
6
TEMPERATURE
(°C)
+25
+25
+25
MIN
MAX
12
85
50
UNITS
pF
pF
pF
FN7994 Rev 1.00
Nov 19, 2014
Page 5 of 15
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