buffered rail-to-rail output voltage capability. It operates
from a single supply with a range of 2.7V to 5.5V. The
reference for the DAC is selectable between the supply
voltage or an internal bandgap reference. Selecting the
internal bandgap reference will set the full-scale output
voltage range to 2.5V. Selecting the supply as the reference
sets the output voltage range to the supply voltage.
The part features a simple 2-wire serial interface compat-
ible with SMBus that allows communication between many
devices. The internal data registers are double buffered to
allow for simultaneous update of several devices at once.
The DAC can be put in low current power-down mode for
use in power conscious systems.
Power-on reset ensures the DAC output is at 0V when
power is initially applied, and all internal registers are
cleared.
For I
2
C designs, please refer to the LTC1669.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
Micropower 10-Bit DAC in SOT-23
Low Operating Current: 60μA
Ultralow Power Shutdown Mode: 10μA
2-Wire Serial Interface Compatible
with SMBus
Selectable Internal Reference or Ratiometric to
V
CC
Maximum DNL Error: 0.75LSB
8 User Selectable Addresses (MSOP Package)
Single 2.7V to 5.5V Operation
Buffered True Rail-to-Rail Voltage Output
Power-On Reset
0.6V V
IL
and 1.4V V
IH
for SDA and SCL
Small 5-Lead SOT-23 and 8-Lead MSOP Packages
APPLICATIONS
n
n
n
n
n
n
Digital Calibration
Offset/Gain Adjustment
Industrial Process Control
Automatic Test Equipment
Arbitrary Function Generators
Battery-Powered Data Conversion Products
BLOCK DIAGRAM
4 (5)
V
CC
1.25V
BANDGAP
REFERENCE
Differential Nonlinearity (DNL)
1.0
0.8
V
REF
= V
CC
= 5V
T
A
= 25°C
REFERENCE
SELECT
ERROR (LSB)
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
R
R
–0.8
–1.0
0
28
156 384 512 640 768 896 1024
CODE
1663 TA01
10-BIT
DAC LATCH
+
–
V
OUT
3 (8)
MSOP
PACKAGE
ONLY
(6) AD0
(2) AD1
(3) AD2
COMMAND
LATCH
INPUT
LATCH
2-WIRE INTERFACE
SDA
1 (1)
SCL
5 (4)
GND
2 (7)
1663 BD
NOTE: PIN NUMBERS IN PARENTHESES REFER TO THE MSOP PACKAGE
1663fd
1
LTC1663
ABSOLUTE MAXIMUM RATINGS
(Note 1)
V
CC
to GND .............................................. – 0.3V to 7.5V
SDA, SCL ................................................. –0.3V to 7.5V
AD0, AD1, AD2 (MSOP Only) ........–0.3V to (V
CC
+ 0.3V)
V
OUT
.............................................–0.3V to (V
CC
+ 0.3V)
Storage Temperature Range.................. –65°C to 150°C
Operating Temperature Range
LTC1663C ............................................... 0°C to 70°C
LTC1663I............................................. –40°C to 85°C
LTC1663E (Note 8).............................. –40°C to 85°C
Lead Temperature (Soldering, 10 sec) ................. 300°C
PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
TOP VIEW
SDA
AD1
AD2
SCL
1
2
3
4
8
7
6
5
V
OUT
GND
AD0
V
CC
TOP VIEW
ORDER PART
NUMBER
SDA 1
GND 2
V
OUT
3
4 V
CC
5 SCL
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 150°C/W
LTC1663CMS8
LTC1663IMS8
LTC1663-8CMS8
LTC1663-8IMS8
MS8 PART MARKING
LTEQ
LTJJ
LTA6
LTA7
LTC1663CS5
LTC1663-1CS5
LTC1663-2CS5
LTC1663ES5
S5 PART MARKING*
LTEP
LTSA
LTSB
LTEP
S5 PACKAGE
5-LEAD PLASTIC SOT-23
T
JMAX
= 125°C,
θ
JA
= 250°C/W
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
CC
set as reference, V
OUT
unloaded, unless otherwise noted.
SYMBOL
DAC
Resolution
Monotonicity
DNL
INL
V
OS
V
OSTC
FSE
Differential Nonlinearity
Integral Nonlinearity
Offset Error
Offset Error Temperature Coefficient
Full-Scale Error
Reference Set to V
CC
Reference Set to Internal Bandgap
Reference Set to V
CC
(LTC1663E)
Reference Set to Internal Bandgap (LTC1663E)
Reference Set to V
CC
Reference Set to Internal Bandgap
Reference Set to V
CC
Reference Set to Internal Bandgap
Reference Set to Internal Bandgap,
Code = 1023
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ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
10
10
TYP
MAX
UNITS
Bits
Bits
(Note 2)
Guaranteed Monotonic (Note 2)
(Note 2)
LTC1663E (Note 2)
Measured at Code 20
Measured at Code 20 (LTC1663E)
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± 0.2
±0.5
±0.5
±10
±10
±15
±3
±3
±0.75
± 2.5
±3
±30
±35
±15
±15
±20
±20
LSB
LSB
LSB
mV
mV
μV/°C
LSB
LSB
LSB
LSB
V
V
μV/°C
μV/°C
LSB/V
1663fd
V
OUT
V
FSTC
PSRR
DAC Output Span
Full-Scale Voltage Temperature
Coefficient
Power Supply Rejection Ratio
0 to V
CC
0 to 2.5
±30
±50
±0.4
2
LTC1663
ELECTRICAL CHARACTERISTICS
SYMBOL
V
CC
I
CC
I
SD
PARAMETER
Positive Supply Voltage
Supply Current
Supply Current in Shutdown Mode
V
CC
= 3V (Note 3)
V
CC
= 5V (Note 3)
(Note 3)
LTC1663E (Note 3)
V
OUT
Shorted to GND, Input Code = 1023
V
OUT
Shorted to V
CC
, Input Code = 0
Input Code = 0, V
CC
= 5V
Input Code = 0, V
CC
= 3V
In Shutdown Mode
Input Code = 1023, V
CC
= 5V
Input Code = 1023, V
CC
= 3V
Rising (Notes 4, 5)
Falling (Notes 4, 5)
To ± 0.5LSB (Notes 4, 5)
1LSB Change Around Major Carry
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The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
CC
set as reference, V
OUT
unloaded, unless otherwise noted.
CONDITIONS
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MIN
2.7
TYP
60
75
10
12
25
30
65
150
500
80
120
0.75
0.25
30
0.75
70
MAX
5.5
100
125
16
24
100
120
UNITS
V
μA
μA
μA
μA
mA
mA
Ω
Ω
kΩ
Ω
Ω
V/μs
V/μs
μs
nV•s
nV•s
V
Op Amp DC Performance
Short-Circuit Current (Sourcing)
Short-Circuit Current (Sinking)
Output Impedance to GND
Output Impedance to V
CC
AC Performance
Voltage Output Slew Rate
Voltage Output Settling Time
Digital Feedthrough
Digital-to-Analog Glitch Impulse
Digital Inputs SCL, SDA
V
IH
V
IL
V
LTH
I
LEAK
C
IN
V
OL
I
UP
V
IH
V
IL
High Level Input Voltage
Low Level Input Voltage
Logic Threshold Voltage
Digital Input Leakage
Digital Input Capacitance
Digital Output Low Voltage
Address Pin Pull-Up Current
High Level Input Voltage
Low Level Input Voltage
1.4
0.6
1
±1.0
±1.2
10
0.4
0.5
V
CC
– 0.3
0.8
1.5
V
V
μA
μA
pF
V
μA
V
V
V
CC
= 5.5V and 0V, V
IN
= GND to V
CC
V
CC
= 5.5V and 0V, V
IN
= GND to V
CC
(LTC1663E)
(Note 7)
I
PULLUP
= 350μA
V
IN
= 0V
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Digital Output SDA
Address Inputs AD0, AD1, AD2 (MSOP Only)
The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
CC
set as reference, V
OUT
unloaded, unless otherwise noted.
SYMBOL
f
SMB
t
BUF
t
HD, STA
t
SU, STA
t
SU, STO
t
HD, DAT
PARAMETER
SMBus Operating Frequency
Bus Free Time Between Stop and Start Condition
Hold Time After (Repeated) Start Condition
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Hold Time
●
●
●
●
●
●
TIMING CHARACTERISTICS
MIN
10
4.7
4.0
4.7
4.0
300
TYP
MAX
100
UNITS
kHz
μs
μs
μs
μs
ns
1663fd
SMBus Timing Characteristics (Notes 6, 7)
3
LTC1663
TIMING CHARACTERISTICS
SYMBOL
t
SU, DAT
t
LOW
t
HIGH
t
f
t
r
PARAMETER
Data Setup Time
Clock Low Period
Clock High Period
Clock, Data Fall Time
Clock, Data Rise Time
●
●
●
●
●
The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
CC
set as reference, V
OUT
unloaded, unless otherwise noted.
MIN
250
4.7
4.0
50
300
1000
TYP
MAX
UNITS
ns
μs
μs
ns
ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Nonlinearity and monotonicity are defined from code 20 to code
1003 (full scale). See Applications Information.
Note 3:
Digital inputs at 0V or V
CC
.
Note 4:
Load is 10kΩ in parallel with 100pF
.
Note 5:
V
CC
= V
REF
= 5V. DAC switched between 0.1V
FS
and 0.9V
FS
, i.e.,
codes k = 102 and k = 922.
Note 6:
All values are referenced to V
IH
and V
IL
levels.
Note 7:
Guaranteed by design and not subject to test.
Note 8:
The LTC1663E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
TYPICAL PERFORMANCE CHARACTERISTICS
Integral Nonlinearity (INL)
1.0
0.8
0.6
0.4
ERROR (LSB)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
28
156 384 512 640 768 896 1024
CODE
1663 G01
Differential Nonlinearity (DNL)
1.0
5.0
V
REF
= V
CC
= 5V
T
A
= 25°C
OUTPUT VOLTAGE (V)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
28
156 384 512 640 768 896 1024
CODE
1663 G02
Source and Sink Current
Capability with V
CC
= 5V
T
A
= 25°C
DAC CODE = 1023
V
REF
= V
CC
= 5V
T
A
= 25°C
0.8
0.6
0.4
ERROR (LSB)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
DAC CODE = 0
0
0
1 2 3 4 5 6 7 8 9 10
OUTPUT CURRENT SOURCE/SINK (mA)
1663 G03
Large-Signal Step Response
5
SDA
(VOLTS) 0
5
4
V
OUT
(VOLTS) 2
1
CODE = 32
0
5μs/DIV
1663 G04
Midscale Glitch
1.0
5V
SDA
0V
ΔV
OUT
(LSB)
0.8
0.6
CODE = 512 TO 511
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
Load Regulation vs Output Current
V
CC
= V
REF
= 5V
V
OUT
= 2.5V
CODE = 512
T
A
= 25°C
CODE = 990
V
CC
= 5V
R
L
= 4.7k
C
L
= 100pF
T
A
= 25°C
3
V
OUT
10mV/DIV
V
CC
= 5V
R
L
= 4.7k
C
L
= 100pF
T
A
= 25°C
2μs/DIV
1663 G05
SOURCE
SINK
–4
–3
–2
–1 0
1
I
OUT
(mA)
2
3
4
1663fd
1663 G06
4
LTC1663
TYPICAL PERFORMANCE CHARACTERISTICS
Load Regulation vs Output Current
1.0
0.8
0.6
0.4
ΔV
OUT
(LSB)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
–1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0
I
OUT
(mA)
1663 G07
Offset Error Voltage vs
Temperature
5
2.510
2.508
2.506
OUTPUT VOLTAGE (V)
2.504
2.502
2.500
2.498
2.496
2.494
2.492
80
100
4
OFFSET ERROR VOLTAGE (mV)
3
2
1
0
–1
–2
–3
–4
–5
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
Full-Scale Output Voltage vs
Temperature
REFERENCE SET TO
INTERNAL BANDGAP
V
CC
= V
REF
= 3V
V
OUT
= 1.5V
CODE = 512
T
A
= 25°C
SOURCE
SINK
2.490
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
80
100
1663 G08
1663 G09
PIN FUNCTIONS
SDA (Pin 1, Pin 1 on SOT-23):
Serial Data Bidirectional
Pin. Data is shifted into the SDA pin and acknowledged
by the SDA pin. High impedance pin while data is shifted
in. Open-drain N-channel output during acknowledgment.
Requires a pull-up resistor or current source to V
CC
.
AD1 (Pin 2):
Slave Address Select Bit 1. Tie this pin to
either V
CC
or GND to modify the corresponding bit of the
LTC1663’s slave address.
AD2 (Pin 3):
Slave Address Select Bit 2. Tie this pin to
either V
CC
or GND to modify the corresponding bit of the
LTC1663’s slave address.
SCL (Pin 4, Pin 5 on SOT-23):
Serial Clock Input Pin.
Data is shifted into the SDA pin at the rising edges of the
clock. This high impedance pin requires a pull-up resistor
or current source to V
CC
.
V
CC
(Pin 5, Pin 4 on SOT-23):
Power Supply. 2.7V ≤ V
CC
≤ 5.5V. Also used as the reference voltage input when the
part is programmed to use V
CC
as the reference.
AD0 (Pin 6):
Slave Address Select Bit 0. Tie this pin to
either V
CC
or GND to modify the corresponding bit of the
LTC1663’s slave address.
GND (Pin 7, Pin 2 on SOT-23):
System Ground.
V
OUT
(Pin 8, Pin 3 on SOT-23):
Voltage Output. Buffered
rail-to-rail DAC output.
DEFINITIONS
Differential Nonlinearity (DNL):
The difference between
the measured change and the ideal 1LSB change for any
two adjacent codes. The DNL error between any two codes
is calculated as follows:
DNL = (ΔV
OUT
– LSB)/LSB
Where
ΔV
OUT
is the measured voltage difference between
two adjacent codes.
Digital Feedthrough:
The glitch that appears at the ana-
log output caused by AC coupling from the digital inputs
when they change state. The area of the glitch is specified
in (nV)(sec).
Full-Scale Error (FSE):
The deviation of the actual full-scale
voltage from ideal. FSE includes the effects of offset and
编译自semiengineering 业界越来越关注人工智能的功耗问题，但这个问题并没有简单的解决方案。这需要深入了解应用、半导体和系统层面的软件和硬件架构，以及所有这些的设计和实现方式。每个环节都会影响总功耗和提供的效用。这是最终必须做出的权衡。 但首先，必须解决效用问题。电力是否被浪费了？“我们将电力用于有价值的用途，”Ansys（现为新思科技旗下公司）产品营销总监 Marc Swi...[详细]
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