DEMO MANUAL DC1646A
LTC5564
15GHz RF Power Detector
with Comparator
Description
The demonstration circuit 1646A features the LTC
®
5564, an
UltraFast™ RF peak detector with a built in gain-selectable
high speed operational amplifier and comparator.
The 1646A demo circuit includes a simple impedance
matching network that provides better than 10dB return
loss for working frequencies ranging from 5.2GHz to
6.2GHz and from 14.7GHz to 16.5GHz. The input matching
circuit can be easily changed for other working frequency
plans. The Demo Circuit Modification page provides the
design information required for modifying with this demo
circuit 1646A.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
UltraFast is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
perForMAnce sUMMArY
PARAMETER
Supply Voltage
Supply Current
Amplifier Characteristics
V
OUT
Output Offset
CONDITIONS
(T
A
= 25°C), V
CC
= V
CCRF
= V
CCA
= V
CCP
= 5V
MIN
3
TYP
44
MAX
5.5
UNITS
V
mA
Demodulation Bandwidth
V
OUT
Output Voltage Swing
Comparator Characteristics
V
COMP
Low
V
COMP
High
Comparator Response Time
Comparator Hysteresis
RF Characteristics
RFIN Frequency Range
RFIN AC Input Resistance
RFIN Input Shunt Capacitance
RFIN Input Power Range
Digital I/O
Supply Voltage = 5V, No RFIN
Gain1
Gain2
Gain4
Gain8
Supply Voltage = 3.3V, No RFIN
Gain1
Gain2
Gain4
Gain8
Gain1, V
OUT
= 500mV
Gain2, V
OUT
= 500mV
Gain4, V
OUT
= 500mV
Gain8, V
OUT
= 500mV
Supply Voltage = 3V to 5V
Supply Voltage = 5V
Supply Voltage = 5V
10dBm RFIN Step to V
COMP
50%
290
295
315
360
280
280
290
315
75
52
35
15
0.3
0.2
4.8
9
10
0.6
15
135
0.77
–24
16
V
CCA
– 1.6
mV
mV
mV
mV
mV
mV
mV
mV
MHz
MHz
MHz
MHz
V
V
V
ns
mV
GHz
Ω
pF
dBm
Frequency = 1000MHz, Power Level = 0dBm
Frequency = 1000MHz, Power Level = 0dBm
LOW = 0.8V (Max), HIGH = V
CCA
– 0.8V (Min)
LEN
Comparator Enable
Comparator Disable
V
CCA
–0.8
0.8
V
V
dc1646af
1
DEMO MANUAL DC1646A
qUick stArt proceDUre
Operation
The demonstration circuit 1646A is preconfigured to work
for applications at frequencies of 5.8GHz and 15GHz. It has
better than 15dB return loss at these targeted frequencies.
The input dynamic range at 5.8GHz is 40dB (from –24dBm
to 16dBm) and slightly lower sensitivity at 15GHz.
Comparator
The high speed comparator compares the external refer-
ence voltage on the V
REF
pin to the internal signal voltage
V
P
from the peak detector and produces the output logic
signal V
COMP
. V
P
is the internal comparator positive input
as shown in Figure 1 Simplified Block Diagram.
The demo board has a typical 10mV hysteresis for its
comparator and its response time can be as fast as 9ns
(10dBm input power step to V
COMP
50%) through out its
supporting frequencies.
The, 1646A demo board’s, LEN test point provides latch
enable/disable functionality of the comparator. The com-
parator is always enabling with the pulling down 10k resistor
(R8) to ground. Connecting The LEN test point to V
CC
will
place the comparator in the disable mode.
The R1 and R2 footprints are optional for configuring DC
voltage of the V
REF
test point. The C1 is the ground coupling
capacitor of the, R1 and R2, voltage divider.
V
CCRF
V
CCA
V
CCP
The VCC_COMP (E11) test point is an alternative output
of V
COMP
(J2 SMA connector). Install a 0Ω resistor
or a jumper to R3 will have the comparator Output at
VCC-COMP test point.
Loading Bypass Capacitors
The LTC5564 has been designed to directly drive a capaci-
tive load of 10pF at V
OUT
. When driving a capacitive load
greater than 10pF a series resistance should be added
between V
OUT
and the load to maintain good stability. This
resistance should be placed as close to V
OUT
as possible.
The demo board 1646A is loaded with R series = R6 = 0Ω.
Refer to Table 2 for typical series resistor (R6) values for
various capacitive loads.
Table 2. Typical Series Resistor (R6) Values for V
OUT
Capacitive
Loading
C
LOAD
Up to 10pF
11pF to 20pF
21pF to 100pF
Greater Than 100pF
R SERIES(R6)
0Ω
40Ω
68Ω
100Ω
Amplifier
The high speed amplifier offers four gain settings and
is capable of driving a 1.7mA load with an output swing
range of approximately 295mV to V
CC
– 1.6V.
The standard demonstration circuit 1646A has a unity
gain. Therefore, the pins G0 and G1 (or the test point
Gain0 and Gain1) are pulling down for the logical Low with
R10 = R11 = 10k resistors. The pins can be connected
to V
CC
forming the logical High for others gains setting.
Refer to Table 3 for gain setting operation.
The V
OUTADJ
pin provides output DC offset adjustment
to satisfy various interface requirements. Setting V
OUT
to 500mV also provides the maximum demodulation
bandwidth in each gain mode.
The R9, R12 and C13 footprints are provided on the demo
board to configure the V
OUTADJ
DC voltage. The R9 and
R12 are forming voltage divider topology and the C13
is the ground coupling capacitor. Refer to the LTC5564
dc1646af
RFIN
250
8pF
80µA
1.2k
V
P
V
BIAS
LEN
+
–
+
–
V
OUTADJ
1.7k
1.6k
200
200
Figure 1. Simplified Block Diagram
2
+
–
V
COMP
V
REF
V
OUT
PROGRAMMABLE
FEEDBACK ARRAY
DC1664 F01
PINS 3, 4,
EXPOSED PAD PIN 17
G1
G0
DEMO MANUAL DC1646A
qUick stArt proceDUre
data sheet for Typical Performance Characteristics curve
or Table 3 for the typical V
OUTADJ
voltage for the desired
V
OUT
DC output offset in each gain setting.
The VCC_OUT (E12) test point is an alternative output of
V
OUT
(J3 SMA CONNECTOR). Install a 0Ω resistor or a
jumper at R5 will have the V
OUT
at this VCC_OUT test point.
The R7 and C12 footprints are provided for output loading
at designed resistance and capacitance.
Demonstration circuit 1646A is easy to setup for evaluat-
ing the performance of the LTC5564. Refer to Figure 2 for
measurement equipment set-up and follow the procedure
below:
A. Measure Detector Output Power (V
OUT
):
Connect DC power supply’s negative (–) lead to demo
board GND test point and positive (+) lead (between
3V to 5.5V) to V
CC
test point.
Connect a DC volt meter to the V
OUT
port (SMA
connector J3) to measure the DC detector output
voltage.
Connect signal generator’s output to demo board RFIN
(SMA connector J1) via coaxial cable. It is common
practice to include a 2dB or 3dB attenuation pad to
minimize reflections back into the signal generator.
(Typical 540mV V
OUT
with 0dBm input power at 5.8GHz)
B. Measure Comparator Output (V
COMP
):
Connect DC power supply’s negative (–) lead to demo
board GND test point and positive (+) lead (between
3V to 5.5V) to V
CC
test point.
Connect a DC volt meter (or an oscilloscope) to the
V
COMP
port (SMA connector J2) to measure the V
COMP
switch point voltages.
Set V
REF
to desired reference voltage. (with 10dBm input
power at RFIN, the typical V
REF
tripped point is 1.23V)
Increase The RF input power level to the point when the
V
COMP
output voltage will go to a high level. (typically
V
CC
– 0.2V)
Optional measurements can be done by increasing V
REF
reference level. During the measurements, when V
COMP
is HIGH, connect LEN to V
CC
. Remove the RF input signal
and the V
COMP
will continue to stay high.
Table 3. Gain Mode and Typical V
OUTADJ
Operation
PIN
G1
GND
GND
V
CCA
V
CCA
G0
GND
V
CCA
GND
V
CCA
GAIN MODE
GAIN1
GAIN2
GAIN4
GAIN8
DESCRIPTION
Minimum Gain Setting (V
OUT
/RFIN ≈ 1.5dB)
V
OUT
/RFIN Increased 6dB
V
OUT
/RFIN Increased 12dB
V
OUT
/RFIN Increased 18dB
REQUIRED V
OUTADJ
FOR A GIVEN DC OUTPUT
OFFSET
V
OUTADJ
= 0.95 • V
OUT
– 0.174
V
OUTADJ
= (V
OUT
– 0.07)/2.10
V
OUTADJ
= (V
OUT
+ 0.05)/3.16
V
OUTADJ
= (V
OUT
+ 0.25)/5.26
Note: Valid range for V
OUT
≈ 0.195V ≤ V
OUT
≤ V
CC
– 1.6
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DEMO MANUAL DC1646A
qUick stArt proceDUre
DC POWER SUPPLY
CH2
GND
V
+
CH1
V
+
(3V TO 5.5V)
2dB OR 3dB
ATTENUATOR PAD
SYNTHESIZED SIGNAL
GENERATOR
HP83731A
FREQUENCY = 1GHz TO 15GHz
AMPLITUDE = –24dBm TO 16dBm
DC VOLT METER
PIN
LEN
GO
GND
V
CC
V
REF
V
P
V
COMP
V
OUT
TRANSPARENT
V
OUT
LATCHED
V
OUT
TRANSPARENT
GND
V
CC
G1
GND
GND
V
CC
V
CC
GAIN
MODE
GAIN1
GAIN2
GAIN4
GAIN8
DC1646 F02
LTC5564 COMPARATOR LATCH ENABLE FUNCTION
Figure 2. Proper Measurement Equipment Set-Up
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DEMO MANUAL DC1646A
qUick stArt proceDUre
Modification of RFIN Port for Other Frequency Ranges
VCC
J2
VCOMP
R4
(OPT)
15
VCCRF
C2
1000pF
C3
100pF
C4
10pF
J1
RFIN
C7
(OPT)
Z1
0.5pF
Z2
(OPT)
C5
2.2pF
17
1
RFIN
2
NC
3
GND
4
16
NC
14
VREF
13
VCOMP
VCCA
VCC
12
11
C9
10pF
C10
100pF
C11
1000pF
R6
E12
VCC_OUT
R5
(OPT)
0 Ohm
C12
(OPT)
R7
(OPT)
VCCP
J3
VOUT
VOUT
10
GND
LEN
VOUTADJ GAIN0
NC
GAIN1
9
U1
LTC5564IUD
5
6
7
8
Impedance Matching Circuits Components and Values at Selected Frequency Ranges
FREQUENCY RANGE
(1)
1.6GHz to 3.4GHz
7GHz to 8.5GHz
8.6GHz to 10.7GHz
11.7GHz to 12.2GHz
0.5GHz to 1.9GHz and
5.7GHz to 11.3GHz
(3)
5.2GHz to 6.2GHz and
14.7GHz to 16.5GHz
(4)
C5
VALUE/PART#
(2)
100pF/GJM1555C1H101JZ01
0.5pF/GJM1555C1HR50BB01
0.2pF/GJM1555C1HR20BB01
10pF/GJM1555C1H100JB01
20pF/GJM1555C1H200JB01
2.2pF/GJM1555C1H2R2CB01
Z1
VALUE/PART#
(2)
6.8nH/0402CS-6N8XGL
0.3pF/GJM1555C1HR30BB01
0.1pF/GJM1555C1HR10BB01
No Placement
137Ω/RK73H1ETTP1370F
0.5pF/GJM1555C1HR50BB01
Z2
VALUE/PART#
(2)
No Placement
No Placement
No Placement
2.2pF/GJM1555C1H2R2CB01
137Ω/RK73H1ETTP1370F
No Placement
(1) The impedance matching networks at stated frequency ranges have 10dB or better return loss.
(2) Capacitors, inductors and resistors are manufacture by MURATA, COILCRAFT or KOA respectively.
(3) Resistive matching has wider frequency ranges at the expense of degraded sensitivity by 6dB to 8dB.
(4) Default DC1646A demo board frequencies ranges.
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