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LTC2629IGN#PBF

产品描述12 位数模转换器 4 16-SSOP
产品类别半导体    数据采集ADC/DAC – 专业   
文件大小318KB,共22页
制造商ADI(亚德诺半导体)
官网地址https://www.analog.com
标准
下载文档 详细参数 全文预览

LTC2629IGN#PBF概述

12 位数模转换器 4 16-SSOP

LTC2629IGN#PBF规格参数

参数名称属性值
类别
厂商名称ADI(亚德诺半导体)
包装管件
位数12
数模转换器数4
建立时间7µs(标准)
输出类型Voltage - Buffered
差分输出
数据接口I²C
参考类型外部
电压 - 供电,模拟2.7V ~ 5.5V
电压 - 供电,数字2.7V ~ 5.5V
INL/DNL (LSB)±1,±0.5(最大)
工作温度-40°C ~ 85°C
封装/外壳16-SSOP(0.154",3.90mm 宽)
供应商器件封装16-SSOP
安装类型表面贴装型
基本产品编号LTC2629

文档预览

下载PDF文档
Features
n
LTC2609/LTC2619/LTC2629
Quad 16-/14-/12-Bit
Rail-to-Rail DACs with
I
2
C Interface
Description
The LTC
®
2609/LTC2619/LTC2629 are quad 16-, 14- and 12-
bit, 2.7V to 5.5V rail-to-rail voltage output DACs in a 16-lead
SSOP package. They have built-in high performance output
buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply, volt-
age-output DACs.
The parts use a 2-wire, I
2
C compatible serial interface. The
LTC2609/LTC2619/LTC2629 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock
rate of 400kHz).
The LTC2609/LTC2619/LTC2629 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero-scale; after power-up, they stay at
zero-scale until a valid write and update take place. The
power-on reset circuit resets the LTC2609-1/LTC2619-1/
LTC2629-1 to mid-scale. The voltage outputs stay at mid-
scale until a valid write and update take place.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5396245. Patent pending.
n
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Smallest Pin-Compatible Quad DACs:
LTC2609: 16 Bits
LTC2619: 14 Bits
LTC2629: 12 Bits
Guaranteed Monotonic Over Temperature
Separate Reference Inputs
27 Selectable Addresses
400kHz I
2
C™ Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 250µA per DAC at 3V
Individual Channel Power Down to 1µA (Max)
High Rail-to-Rail Output Drive (±15mA, Min)
Ultralow Crosstalk Between DACs (5µV)
LTC2609/LTC2619/LTC2629: Power-On Reset to
Zero-Scale
LTC2609-1/LTC2619-1/LTC2629-1: Power-On Reset
to Mid-Scale
Tiny 16-Lead Narrow SSOP Package
applications
n
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Mobile Communications
Process Control and Industrial Automation
Automatic Test Equipment and Instrumentation
Block Diagram
REFA
3
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
V
OUTA
4
V
OUTB
5
REFB
6
CONTROL
LOGIC
DAC B
DAC A
DAC D
REFLO
2
GND
1
V
CC
16
REFD
15
V
OUTD
14
1.0
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
V
OUTC
DAC C
13
REFC
12
DNL (LSB)
0.8
0.6
0.4
0.2
0
–0.2
–0.4
32-BIT SHIFT REGISTER
SCL
8
SDA
9
I
2
C
INTERFACE
ADDRESS
DECODE
LOGIC
CA0
11
CA1
10
CA2
7
2609 BD
Differential Nonlinearity
(LTC2609)
V
CC
= 5V
V
REF
= 4.096V
–0.6
–0.8
–1.0
0
16384
32768
CODE
49152
65535
2609 G02
26091929fb

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