C8051F70x/71x
Mixed Signal ISP Flash MCU Family
Capacitance to Digital Converter
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Supports buttons, sliders, wheels, capacitive prox-
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10-Bit Analog to Digital Converter
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Up to 500 ksps
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Up to 16 external single-ended inputs
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VREF from on-chip VREF, external pin or V
DD
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Internal or external start of conversion source
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Built-in temperature sensor
Analog Comparator
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Programmable hysteresis and response time
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Configurable as interrupt or reset source
On-Chip Debug
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On-chip debug circuitry facilitates full speed, non-
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intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Low cost,
complete
development kit
imity, and touch screen sensing
Up to 38 input channels
Fast 40 µs per channel conversion time
12, 13, 14, or 16-bit output
Auto-scan and wake-on-touch
Auto-accumulate 4, 8, 16, 32, or 64 samples
High-Speed 8051 µC Core
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Pipelined instruction architecture; executes 70% of
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Memory
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512 bytes internal data RAM (256 + 256)
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Up to 16 kB Flash; In-system programmable in 512-
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Digital Peripherals
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Up to 54 Port I/O with high sink current
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Hardware enhanced UART, SMBus™ (I
2
C compati-
byte Sectors
Up to 32-byte data EEPROM
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ANALOG
PERIPHERALS
10-bit
500 ksps
ADC
TEMP
SENSOR
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Capacitive
Sense
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VOLTAGE
COMPARATOR
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Supply Voltage 1.8 to 3.6 V
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Built-in voltage supply monitor
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Ext. Memory I/F
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24.5 MHz PRECISION INTERNAL OSCILLATOR
HIGH-SPEED CONTROLLER CORE
16 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
512 B RAM
32 B EEPROM
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Copyright © 2010 by Silicon Laboratories
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Clock Sources
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24.5 MHz ±2% Oscillator Supports crystal-less
ble), and enhanced SPI™ serial ports
Four general purpose 16-bit counter/timers
16-Bit programmable counter array (PCA) with 3
capture/compare modules and enhanced PWM
functionality
Real time clock mode using timer and crystal
UART operation
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly; useful
in power saving modes
64-Pin TQFP, 48-Pin TQFP, 48-Pin QFN,
32-Pin QFN, 24-Pin QFN
Temperature Range: –40 to +85 °C
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6.0
– 6.5
POR
WDT
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C8051F70x/71x
instructions in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
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Table of Contents
1. System Overview ..................................................................................................... 17
2. Ordering Information ............................................................................................... 26
3. Pin Definitions.......................................................................................................... 28
4. TQFP-64 Package Specifications ........................................................................... 37
5. TQFP-48 Package Specifications ........................................................................... 39
6. QFN-48 Package Specifications ............................................................................. 41
7. QFN-32 Package Specifications ............................................................................. 43
8. QFN-24 Package Specifications ............................................................................. 45
9. Electrical Characteristics ........................................................................................ 47
9.1. Absolute Maximum Specifications..................................................................... 47
9.2. Electrical Characteristics ................................................................................... 48
10. 10-Bit ADC (ADC0) ................................................................................................. 55
10.1. Output Code Formatting .................................................................................. 56
10.2. 8-Bit Mode ....................................................................................................... 56
10.3. Modes of Operation ......................................................................................... 56
10.3.1. Starting a Conversion.............................................................................. 56
10.3.2. Tracking Modes....................................................................................... 57
10.3.3. Settling Time Requirements.................................................................... 58
10.4. Programmable Window Detector..................................................................... 62
10.4.1. Window Detector Example...................................................................... 64
10.5. ADC0 Analog Multiplexer ................................................................................ 65
11. Temperature Sensor .............................................................................................. 67
11.1. Calibration ....................................................................................................... 67
12. Voltage and Ground Reference Options.............................................................. 69
12.1. External Voltage References........................................................................... 70
12.2. Internal Voltage Reference Options ................................................................ 70
12.3. Analog Ground Reference............................................................................... 70
12.4. Temperature Sensor Enable ........................................................................... 70
13. Voltage Regulator (REG0) ..................................................................................... 72
14. Comparator0........................................................................................................... 74
14.1. Comparator Multiplexer ................................................................................... 78
15. Capacitive Sense (CS0) ......................................................................................... 80
15.1. Configuring Port Pins as Capacitive Sense Inputs .......................................... 81
15.2. CS0 Gain Adjustment ...................................................................................... 81
15.3. Capacitive Sense Start-Of-Conversion Sources ............................................. 81
15.4. Automatic Scanning......................................................................................... 83
15.5. CS0 Comparator.............................................................................................. 84
15.6. CS0 Conversion Accumulator ......................................................................... 85
15.7. CS0 Pin Monitor .............................................................................................. 86
15.8. Adjusting CS0 For Special Situations.............................................................. 87
15.9. Capacitive Sense Multiplexer .......................................................................... 96
16. CIP-51 Microcontroller........................................................................................... 98
16.1. Instruction Set.................................................................................................. 99
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16.1.1. Instruction and CPU Timing .................................................................... 99
16.2. CIP-51 Register Descriptions ........................................................................ 104
17. Memory Organization .......................................................................................... 108
17.1. Program Memory........................................................................................... 109
17.1.1. MOVX Instruction and Program Memory .............................................. 109
17.2. EEPROM Memory ......................................................................................... 109
17.3. Data Memory ................................................................................................. 109
17.3.1. Internal RAM ......................................................................................... 109
17.3.1.1. General Purpose Registers .......................................................... 110
17.3.1.2. Bit Addressable Locations ............................................................ 110
17.3.1.3. Stack .......................................................................................... 110
18. External Data Memory Interface and On-Chip XRAM ....................................... 111
18.1. Accessing XRAM........................................................................................... 111
18.1.1. 16-Bit MOVX Example .......................................................................... 111
18.1.2. 8-Bit MOVX Example ............................................................................ 111
18.2. Configuring the External Memory Interface ................................................... 112
18.3. Port Configuration.......................................................................................... 112
18.4. Multiplexed and Non-multiplexed Selection................................................... 115
18.4.1. Multiplexed Configuration...................................................................... 115
18.4.2. Non-multiplexed Configuration.............................................................. 116
18.5. Memory Mode Selection................................................................................ 117
18.5.1. Internal XRAM Only .............................................................................. 117
18.5.2. Split Mode without Bank Select............................................................. 117
18.5.3. Split Mode with Bank Select.................................................................. 118
18.5.4. External Only......................................................................................... 118
18.6. Timing .......................................................................................................... 118
18.6.1. Non-Multiplexed Mode .......................................................................... 120
18.6.1.1. 16-bit MOVX: EMI0CF[4:2] = 101, 110, or 111............................. 120
18.6.1.2. 8-bit MOVX without Bank Select: EMI0CF[4:2] = 101 or 111 ....... 121
18.6.1.3. 8-bit MOVX with Bank Select: EMI0CF[4:2] = 110 ....................... 122
18.6.2. Multiplexed Mode .................................................................................. 123
18.6.2.1. 16-bit MOVX: EMI0CF[4:2] = 001, 010, or 011............................. 123
18.6.2.2. 8-bit MOVX without Bank Select: EMI0CF[4:2] = 001 or 011 ....... 124
18.6.2.3. 8-bit MOVX with Bank Select: EMI0CF[4:2] = 010 ....................... 125
19. In-System Device Identification.......................................................................... 128
20. Special Function Registers................................................................................. 130
21. Interrupts .............................................................................................................. 137
21.1. MCU Interrupt Sources and Vectors.............................................................. 138
21.1.1. Interrupt Priorities.................................................................................. 138
21.1.2. Interrupt Latency ................................................................................... 138
21.2. Interrupt Register Descriptions ...................................................................... 140
21.3. INT0 and INT1 External Interrupts................................................................. 146
22. Flash Memory....................................................................................................... 148
22.1. Programming The Flash Memory .................................................................. 148
22.1.1. Flash Lock and Key Functions .............................................................. 148
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22.1.2. Flash Erase Procedure ......................................................................... 148
22.1.3. Flash Write Procedure .......................................................................... 149
22.2. Non-volatile Data Storage ............................................................................. 149
22.3. Security Options ............................................................................................ 149
22.4. Flash Write and Erase Guidelines ................................................................. 150
22.4.1. VDD Maintenance and the VDD Monitor .............................................. 151
22.4.2. PSWE Maintenance .............................................................................. 151
22.4.3. System Clock ........................................................................................ 152
23. EEPROM ............................................................................................................... 155
23.1. RAM Reads and Writes ................................................................................. 155
23.2. Auto Increment .............................................................................................. 155
23.3. Interfacing with the EEPROM........................................................................ 155
23.4. EEPROM Security ......................................................................................... 156
24. Power Management Modes................................................................................. 160
24.1. Idle Mode....................................................................................................... 160
24.2. Stop Mode ..................................................................................................... 161
24.3. Suspend Mode .............................................................................................. 161
25. Reset Sources ...................................................................................................... 163
25.1. Power-On Reset ............................................................................................ 164
25.2. Power-Fail Reset / VDD Monitor ................................................................... 165
25.3. External Reset ............................................................................................... 166
25.4. Missing Clock Detector Reset ....................................................................... 166
25.5. Comparator0 Reset ....................................................................................... 167
25.6. Watchdog Timer Reset.................................................................................. 167
25.7. Flash Error Reset .......................................................................................... 167
25.8. Software Reset .............................................................................................. 167
26. Watchdog Timer................................................................................................... 169
26.1. Enable/Reset WDT........................................................................................ 169
26.2. Disable WDT ................................................................................................. 169
26.3. Disable WDT Lockout.................................................................................... 169
26.4. Setting WDT Interval ..................................................................................... 169
27. Oscillators and Clock Selection ......................................................................... 171
27.1. System Clock Selection................................................................................. 171
27.2. Programmable Internal High-Frequency (H-F) Oscillator .............................. 173
27.3. External Oscillator Drive Circuit..................................................................... 175
27.3.1. External Crystal Example...................................................................... 177
27.3.2. External RC Example............................................................................ 178
27.3.3. External Capacitor Example.................................................................. 179
28. Port Input/Output ................................................................................................. 180
28.1. Port I/O Modes of Operation.......................................................................... 181
28.1.1. Port Pins Configured for Analog I/O...................................................... 181
28.1.2. Port Pins Configured For Digital I/O...................................................... 181
28.1.3. Interfacing Port I/O to 5 V Logic ............................................................ 182
28.1.4. Increasing Port I/O Drive Strength ........................................................ 182
28.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 182
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