Si3482
P
OWER
M
ANAGEMENT
C
ON TROLLER
Features
Pin Assignments
Enables use of smaller power
supplies for up to 48-port PoE
systems with Si3452 PSE interface
ICs
Can operate with or without a host
Configuration save
Pin-selectable SPI or UART interface
Pin-selectable UART data rate
Fully-compliant with IEEE 802.3
clause 33 for PoE including the
802.3at amendment for higher power
(30 W, category 2 ports)
Supports classification-based and
LLDP power negotiation
Supports individual port priority and
port configuration
Supports Power supply status from
up to 3 power supplies
24 pin Quad flat pack package
(4x4 mm)
4x4 mm PCB footprint; RoHS
complaint
Extended operation range
(–40 to +85 °C)
24-Pin QFN
RSVD
20
MOSI
NSS
INT
19
18 SDA
17 SCL
16 BAUD0
15 BAUD1
14 BAUD2
13 PSLCT
10
11
12
7
8
9
PS1
RX
21
PS3
TX
22
RSVD
24
1
2
3
4
5
6
23
MISO
SCK
GND
VDD
RST
RSVD
Top View
(Pads on Bottom of Package)
RSVD
RSVD
Power over Ethernet Endpoint
switches and Midspans for IEEE Std
802.3af and 802.3at
Supports high-power PDs, such as:
Pan/Tilt/Zoom security cameras
802.11n WAPs
Multi-band, multi-radio WAPs
Security and RFID systems
Industrial automation systems
Networked audio
IP Phone Systems and iPBXs
Metropolitan area networked WAPs,
cameras, and sensors
WiMAX, ASN/BTS, and CPE/ODU
systems
See "5. Pin Descriptions" on page 31.
Description
The Si3452 is capable of delivering over 30 W per port, which means that, in a 24-
or 48-port system, a very large power supply would have to be used to avoid
overload. Typically, not all ports are used at full power; so, a smaller power supply
in the range of 5 W per port can be used along with the Si3482 power
management controller.
The Si3482 is a power manager intended for use with the Si3452/3 Power over
Ethernet (PoE) controllers for power management of up to 48 ports with three
power sources.
Use of the Si3482 power manager greatly simplifies system implementation of
power management. The Si3482 power management controller is programmed
via a SPI or UART interface to set the power supply capacity, the port power
configuration (Category 1: 15.4 W, or high-power category 2: 30 W) ports, the port
priority, the detection timing (Alternative A or Alternative B), and the fault recovery
protocol. Once programmed, the configuration data can be saved, and the Si3482
can work without host intervention. If desired, port and overall status information is
available and continuously updated.
The Si3482 uses the real-time overload and current monitoring capability of the
Si3452 to manage provided power among up to 48 ports. Power management is
selectable between grant-based or consumption-based in order to supply power
to the greatest number of ports.
In high-reliability systems, multiple power supplies are often connected to provide
redundancy, which further increases the power supply requirements. The Si3482
can manage up to three power supplies automatically enabling or disabling ports
in priority order when required.
Rev. 0.1 10/10
Copyright © 2010 by Silicon Laboratories
Si3482
PS2
Applications
Si3482
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2.1. Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2.2. Hardware Only Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3. Serial Packet Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.1. Packet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2. SPP Error Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4. Power Manager API . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1. Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2. System Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3. Port Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4. System Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.5. Port Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.6. System Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.7. Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.8. Power Supply Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
4.9. Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.10. Return Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6. Package Outline: 24-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
7. PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
8. Solder/Paste Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9. Top Marking Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
10. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Rev. 0.1
3
Si3482
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Description
Operating Temperature
Range
V
DD
Supply Voltage
Symbol
T
A
V
DD
Test Conditions
No airflow
All operating modes
Min
–40
2.7
Typ
—
—
Max
85
3.6
Units
°C
V
Table 2. Absolute Maximum Ratings
Parameter
Ambient Temperature
under Bias
Storage Temperature
Voltage on any I/O with
Respect to GND
Voltage on V
DD
with
Respect to GND
V
DD
>2.2 V
Conditions
Min
–55
–65
–0.3
–0.3
Typ
—
—
—
—
Max
125
150
5.8
4.2
Units
°C
°C
V
V
Note:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the devices at those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
Table 3. Electrical Characteristics
Description
Input High
Input Low
Input Leakage Current
Output Low
(MOSI, TX, SCL, and SDA)
Output High
(MOSI, TX)
V
DD
Current
Symbol
V
IH
V
IL
I
IL
V
OL
V
OH
I
DD
Test Conditions
Input pins:
RST, SCK, MOSI, NSS,
RX, PSn, BAUDn,
SLCTIN, SCL, SDA
I
OL
= 8.5 mA
I
OH
= –3 mA
VDD = 3.0 V*
VDD = 3.6 V*
Min
2.0
—
—
—
—
—
Typ
—
—
—
—
—
—
Max
—
0.8
±1
0.6
V
DD
–0.7
8.6
12.1
Units
V
V
uA
V
V
mA
*Note:
V
DD
= 2.7 to 3.6 V, –40 to 85 °C unless otherwise noted.
4
Rev. 0.1
Si3482
Table 4. Timing Requirements
Description
Test Conditions
Min
Max
Units
SPI Timing Requirements (See Figure 1)
T
SE
T
SD
T
SEZ
T
SDZ
T
CKH
T
CKL
T
SIS
T
SIH
T
SCH
F
MAX
NSS Falling to First SCK Edge
Last SCK Edge to NSS Rising
NSS Falling to MISO Valid
NSS Rising to MISO High Z
SCK High Time
SCK Low Time
MOSI Valid to SCK Sample Edge
SCK Sample Edge to MOSI Change
SCK Shift Edge to MISO Change
Maximum SPI Clock Speed
84
84
—
—
210
210
84
84
—
—
—
—
168
168
—
—
—
—
168
1
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
UART Requirements (See Figure 2)
ΔFTx
ΔFRx
Deviation of Tx Transmit Speed from Pin-programmed
Value.
Deviation of Rx receive Speed from Pin-programmed
Value.
–3
–4
+3
+4
%
%
T
SE
T
CKH
T
CKL
T
SD
SCK
T
SIH
MOSI
MSB
T
SIS
MISO
T
SEZ
NSS
MSB
Bit 6
Bit 5
T
SCH
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
T
SDZ
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Figure 1. SPI Timing Diagram
MARK
SPACE
BIT TIMES
START
BIT
D0
D1
D2
D3
D4
D5
D6
D7
STOP
BIT
BIT SAMPLING
Figure 2. UART Timing Diagram
Rev. 0.1
5
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