C8051T610/1/2/3/4/5/6/7
Mixed-Signal Byte-Programmable EPROM MCU
Analog Peripherals
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10-Bit ADC (‘T610/1/2/3/6 only)
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High-Speed 8051 µC Core
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Pipelined instruction architecture; executes 70% of
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Digital Peripherals
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29/25/21 Port I/O with high sink current capability
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Hardware enhanced UART, SMBus™, and
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Comparators
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Programmable hysteresis and response time
Configurable as interrupt sources
Configurable as reset source (Comparator 0)
Low current (<0.5 µA)
On-Chip Debug
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C8051F310 can be used as code development
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platform; Complete development kit available
On-chip debug circuitry facilitates full speed,
non-intrusive in-system debug
Provides breakpoints, single stepping,
inspect/modify memory and registers
enhanced SPI™ serial ports
Four general purpose 16-bit counter/timers
16-Bit programmable counter array (PCA) with five
capture/compare modules and PWM functionality
Clock Sources
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Internal oscillator: 24.5 MHz with ±2% accuracy
Supply Voltage 1.8 to 3.6 V
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On-chip LDO for internal core supply
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Built-in voltage supply monitor
Memory
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1280 Bytes internal data RAM (256 + 1024)
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16 or 8 kB byte-programmable EPROM code mem-
ory
Temperature Range: –40 to +85 °C
CROSSBAR
ANALOG
PERIPHERALS
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VOLTAGE
COMPARATORS
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DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
Port 1
Port 2
Port 3
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TEMP
SENSOR
C8051T610/1/2/3/6 only
PROGRAMMABLE PRECISION INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
16 kB/8 kB
EPROM
14
INTERRUPTS
8051 CPU
(25MIPS)
DEBUG
CIRCUITRY
1280 B
SRAM
POR
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10-bit
500 ksps
ADC
Copyright © 2011 by Silicon Laboratories
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supports crystal-less UART operation
External oscillator: RC, C, or CMOS Clock
Can switch between clock sources on-the-fly; useful
in power saving modes
Packages
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32-pin LQFP (C8051T610/2/4)
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28-pin QFN (C8051T611/3/5)
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24-pin QFN (C8051T616/7)
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Up to 500 ksps
Up to 21, 17, or 13 external inputs
VREF from external pin, Internal Regulator or V
DD
Internal or external start of conversion source
Built-in temperature sensor
instructions in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
C8051T610/1/2/3/4/5/6/7
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Table of Contents
1. System Overview ..................................................................................................... 15
2. Ordering Information ............................................................................................... 19
3. Pin Definitions.......................................................................................................... 20
4. LQFP-32 Package Specifications ........................................................................... 25
5. QFN-28 Package Specifications ............................................................................. 27
6. QFN-24 Package Specifications ............................................................................. 29
7. Electrical Characteristics ........................................................................................ 31
7.1. Absolute Maximum Specifications..................................................................... 31
7.2. Electrical Characteristics ................................................................................... 32
7.3. Typical Performance Curves ............................................................................. 38
8. 10-Bit ADC (ADC0, C8051T610/1/2/3/6 only).......................................................... 39
8.1. Output Code Formatting .................................................................................... 40
8.2. 8-Bit Mode ......................................................................................................... 40
8.3. Modes of Operation ........................................................................................... 40
8.3.1. Starting a Conversion................................................................................ 40
8.3.2. Tracking Modes......................................................................................... 41
8.3.3. Settling Time Requirements...................................................................... 42
8.4. Programmable Window Detector....................................................................... 46
8.4.1. Window Detector Example........................................................................ 48
8.5. ADC0 Analog Multiplexer (C8051T610/1/2/3/6 only)......................................... 49
9. Temperature Sensor (C8051T610/1/2/3/6 only) ..................................................... 51
9.1. Calibration ......................................................................................................... 51
10. Voltage Reference Options ................................................................................... 54
11. Voltage Regulator (REG0) ..................................................................................... 56
12. Comparator0 and Comparator1............................................................................ 58
12.1. Comparator Multiplexers ................................................................................. 65
13. CIP-51 Microcontroller........................................................................................... 68
13.1. Instruction Set.................................................................................................. 69
13.1.1. Instruction and CPU Timing .................................................................... 69
13.2. CIP-51 Register Descriptions .......................................................................... 74
14. Memory Organization ............................................................................................ 77
14.1. Program Memory............................................................................................. 78
14.2. Data Memory ................................................................................................... 78
14.2.1. Internal RAM ........................................................................................... 78
14.2.1.1. General Purpose Registers ............................................................ 79
14.2.1.2. Bit Addressable Locations .............................................................. 79
14.2.1.3. Stack ............................................................................................ 79
14.2.2. External RAM .......................................................................................... 79
15. Special Function Registers................................................................................... 81
16. Interrupts ................................................................................................................ 85
16.1. MCU Interrupt Sources and Vectors................................................................ 86
16.1.1. Interrupt Priorities.................................................................................... 86
16.1.2. Interrupt Latency ..................................................................................... 86
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16.2. Interrupt Register Descriptions ........................................................................ 87
16.3. External Interrupts INT0 and INT1................................................................... 92
17. EPROM Memory ..................................................................................................... 94
17.1. Programming and Reading the EPROM Memory ........................................... 94
17.1.1. EPROM Write Procedure ........................................................................ 94
17.1.2. EPROM Read Procedure........................................................................ 95
17.2. Security Options .............................................................................................. 95
17.3. Program Memory CRC .................................................................................... 96
17.3.1. Performing 32-bit CRCs on Full EPROM Content .................................. 96
17.3.2. Performing 16-bit CRCs on 256-Byte EPROM Blocks............................ 96
18. Power Management Modes................................................................................... 97
18.1. Idle Mode......................................................................................................... 97
18.2. Stop Mode ....................................................................................................... 98
19. Reset Sources ...................................................................................................... 100
19.1. Power-On Reset ............................................................................................ 101
19.2. Power-Fail Reset/VDD Monitor ..................................................................... 102
19.3. External Reset ............................................................................................... 103
19.4. Missing Clock Detector Reset ....................................................................... 103
19.5. Comparator0 Reset ....................................................................................... 104
19.6. PCA Watchdog Timer Reset ......................................................................... 104
19.7. EPROM Error Reset ...................................................................................... 104
19.8. Software Reset .............................................................................................. 104
20. Oscillators and Clock Selection ......................................................................... 106
20.1. System Clock Selection................................................................................. 106
20.2. Programmable Internal High-Frequency (H-F) Oscillator .............................. 108
20.3. External Oscillator Drive Circuit..................................................................... 110
20.3.1. External RC Example............................................................................ 112
20.3.2. External Capacitor Example.................................................................. 112
21. Port Input/Output ................................................................................................. 113
21.1. Port I/O Modes of Operation.......................................................................... 114
21.1.1. Port Pins Configured for Analog I/O...................................................... 114
21.1.2. Port Pins Configured For Digital I/O...................................................... 114
21.1.3. Interfacing Port I/O to 5V Logic ............................................................. 115
21.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 116
21.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 116
21.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 116
21.2.3. Assigning Port I/O Pins to INT0 or INT1 external interrupts.................. 117
21.3. Priority Crossbar Decoder ............................................................................. 117
21.4. Port I/O Initialization ...................................................................................... 121
21.5. Special Function Registers for Accessing and Configuring Port I/O ............. 124
22. SMBus................................................................................................................... 132
22.1. Supporting Documents .................................................................................. 133
22.2. SMBus Configuration..................................................................................... 133
22.3. SMBus Operation .......................................................................................... 133
22.3.1. Transmitter Vs. Receiver....................................................................... 134
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22.3.2. Arbitration.............................................................................................. 134
22.3.3. Clock Low Extension............................................................................. 134
22.3.4. SCL Low Timeout.................................................................................. 134
22.3.5. SCL High (SMBus Free) Timeout ......................................................... 135
22.4. Using the SMBus........................................................................................... 135
22.4.1. SMBus Configuration Register.............................................................. 135
22.4.2. SMB0CN Control Register .................................................................... 139
22.4.3. Data Register ........................................................................................ 142
22.5. SMBus Transfer Modes................................................................................. 143
22.5.1. Write Sequence (Master) ...................................................................... 143
22.5.2. Read Sequence (Master) ...................................................................... 144
22.5.3. Write Sequence (Slave) ........................................................................ 145
22.5.4. Read Sequence (Slave) ........................................................................ 146
22.6. SMBus Status Decoding................................................................................ 146
23. UART0 ................................................................................................................... 149
23.1. Enhanced Baud Rate Generation.................................................................. 150
23.2. Operational Modes ........................................................................................ 151
23.2.1. 8-Bit UART ............................................................................................ 151
23.2.2. 9-Bit UART ............................................................................................ 152
23.3. Multiprocessor Communications ................................................................... 153
24. Enhanced Serial Peripheral Interface (SPI0) ..................................................... 157
24.1. Signal Descriptions........................................................................................ 158
24.1.1. Master Out, Slave In (MOSI)................................................................. 158
24.1.2. Master In, Slave Out (MISO)................................................................. 158
24.1.3. Serial Clock (SCK) ................................................................................ 158
24.1.4. Slave Select (NSS) ............................................................................... 158
24.2. SPI0 Master Mode Operation ........................................................................ 159
24.3. SPI0 Slave Mode Operation .......................................................................... 160
24.4. SPI0 Interrupt Sources .................................................................................. 161
24.5. Serial Clock Phase and Polarity .................................................................... 161
24.6. SPI Special Function Registers ..................................................................... 163
25. Timers ................................................................................................................... 170
25.1. Timer 0 and Timer 1 ...................................................................................... 172
25.1.1. Mode 0: 13-bit Counter/Timer ............................................................... 172
25.1.2. Mode 1: 16-bit Counter/Timer ............................................................... 173
25.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload..................................... 174
25.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................ 175
25.2. Timer 2 .......................................................................................................... 180
25.2.1. 16-bit Timer with Auto-Reload............................................................... 180
25.2.2. 8-bit Timers with Auto-Reload............................................................... 181
25.3. Timer 3 .......................................................................................................... 185
25.3.1. 16-bit Timer with Auto-Reload............................................................... 185
25.3.2. 8-bit Timers with Auto-Reload............................................................... 186
26. Programmable Counter Array............................................................................. 190
26.1. PCA Counter/Timer ....................................................................................... 191
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