C8051F040/1/2/3/4/5/6/7
8K ISP FLASH MCU Family
Analog Peripherals
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10 or 12-Bit SAR ADC
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12-bit (C8051F040/1) or
10-bit (C8051F042/3/4/5/6/7) resolution
± 1 LSB INL, guaranteed no missing codes
Programmable throughput up to 100 ksps
13 External Inputs; single-ended or differential
SW programmable high voltage difference amplifier
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor
Programmable throughput up to 500 ksps
8 External Inputs, single-ended or differential
Programmable amplifier gain: 4, 2, 1, 0.5
Can synchronize outputs to timers for jitter-free wave-
form generation
Programmable hysteresis/response time
High-Speed 8051
μC
Core
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Pipelined instruction architecture; executes 70% of
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Memory
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4352 bytes internal data RAM (4 k + 256)
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64 kB (C8051F040/1/2/3/4/5)
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instruction set in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
20 vectored interrupt sources
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8-bit SAR ADC (C8051F040/1/2/3 only)
or 32 kB (C8051F046/7) Flash; in-system program-
mable in 512-byte sectors
External 64 kB data memory interface (programma-
ble multiplexed or non-multiplexed modes)
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Two 12-bit DACs (C8051F040/1/2/3 only)
Three Analog Comparators
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Digital Peripherals
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8 byte-wide port I/O (C8051F040/2/4/6); 5 V tolerant
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4 byte-wide port I/O (C8051F041/3/5/7); 5 V tolerant
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Bosch Controller Area Network (CAN 2.0B), hard-
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ware SMBus™ (I
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C™ Compatible), SPI™, and
two UART serial ports available concurrently
Programmable 16-bit counter/timer array with
6 capture/compare modules
5 general purpose 16-bit counter/timers
Dedicated watch-dog timer; bi-directional reset pin
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Voltage Reference
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Precision V
DD
Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
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On-chip debug circuitry facilitates full- speed, non-
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intrusive in-circuit/in-system debugging
Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
IEEE1149.1 compliant boundary scan
Complete development kit
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Clock Sources
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Internal calibrated programmable oscillator: 3 to
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Supply Voltage: 2.7 to 3.6 V
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Multiple power saving sleep and shutdown modes
100-Pin and 64-Pin TQFP Packages Available
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Temperature Range: –40 to +85 °C
24.5 MHz
External oscillator: crystal, RC, C, or clock
Real-time clock mode using Timer 2, 3, 4, or PCA
Rev. 1.6 5/16
Copyright © 2016 by Silicon Laboratories
C8051F040/1/2/3/4/5/6/7
C8051F040/1/2/3/4/5/6/7
2
Rev. 1.6
C8051F040/1/2/3/4/5/6/7
Table of Contents
1. System Overview.................................................................................................... 19
1.1. CIP-51™ Microcontroller Core.......................................................................... 25
1.1.1. Fully 8051 Compatible.............................................................................. 25
1.1.2. Improved Throughput ............................................................................... 25
1.1.3. Additional Features .................................................................................. 26
1.2. On-Chip Memory............................................................................................... 27
1.3. JTAG Debug and Boundary Scan..................................................................... 28
1.4. Programmable Digital I/O and Crossbar ........................................................... 29
1.5. Programmable Counter Array ........................................................................... 30
1.6. Controller Area Network.................................................................................... 31
1.7. Serial Ports ....................................................................................................... 31
1.8. 12/10-Bit Analog to Digital Converter................................................................ 32
1.9. 8-Bit Analog to Digital Converter (C8051F040/1/2/3 Only) ............................... 33
1.10.Comparators and DACs ................................................................................... 34
2. Absolute Maximum Ratings .................................................................................. 35
3. Global DC Electrical Characteristic ...................................................................... 36
4. Pinout and Package Definitions............................................................................ 37
5. 12-Bit ADC (ADC0, C8051F040/1 Only)................................................................. 47
5.1. Analog Multiplexer and PGA............................................................................. 47
5.1.1. Analog Input Configuration....................................................................... 48
5.2. High-Voltage Difference Amplifier..................................................................... 52
5.3. ADC Modes of Operation.................................................................................. 54
5.3.1. Starting a Conversion............................................................................... 54
5.3.2. Tracking Modes........................................................................................ 54
5.3.3. Settling Time Requirements ..................................................................... 56
5.4. ADC0 Programmable Window Detector ........................................................... 62
6. 10-Bit ADC (ADC0, C8051F042/3/4/5/6/7 Only)..................................................... 69
6.1. Analog Multiplexer and PGA............................................................................. 69
6.1.1. Analog Input Configuration....................................................................... 70
6.2. High-Voltage Difference Amplifier..................................................................... 74
6.3. ADC Modes of Operation.................................................................................. 76
6.3.1. Starting a Conversion............................................................................... 76
6.3.2. Tracking Modes........................................................................................ 76
6.3.3. Settling Time Requirements ..................................................................... 78
6.4. ADC0 Programmable Window Detector ........................................................... 84
7. 8-Bit ADC (ADC2, C8051F040/1/2/3 Only)............................................................. 91
7.1. Analog Multiplexer and PGA............................................................................. 91
7.2. ADC2 Modes of Operation................................................................................ 92
7.2.1. Starting a Conversion............................................................................... 92
7.2.2. Tracking Modes........................................................................................ 92
7.2.3. Settling Time Requirements ..................................................................... 94
7.3. ADC2 Programmable Window Detector ......................................................... 100
7.3.1. Window Detector in Single-Ended Mode................................................ 100
Rev. 1.6
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C8051F040/1/2/3/4/5/6/7
7.3.2. Window Detector in Differential Mode .................................................... 102
8. DACs, 12-Bit Voltage Mode (C8051F040/1/2/3 Only) ......................................... 105
8.1. DAC Output Scheduling.................................................................................. 106
8.1.1. Update Output On-Demand ................................................................... 106
8.1.2. Update Output Based on Timer Overflow .............................................. 106
8.2. DAC Output Scaling/Justification .................................................................... 106
9. Voltage Reference (C8051F040/2/4/6) ................................................................. 113
10. Voltage Reference (C8051F041/3/5/7) ................................................................. 117
11. Comparators ......................................................................................................... 121
11.1.Comparator Inputs.......................................................................................... 123
12. CIP-51 Microcontroller ......................................................................................... 127
12.1.Instruction Set................................................................................................. 129
12.1.1.Instruction and CPU Timing ................................................................... 129
12.1.2.MOVX Instruction and Program Memory ............................................... 129
12.2.Memory Organization ..................................................................................... 133
12.2.1.Program Memory ................................................................................... 133
12.2.2.Data Memory.......................................................................................... 134
12.2.3.General Purpose Registers.................................................................... 134
12.2.4.Bit Addressable Locations...................................................................... 134
12.2.5.Stack ..................................................................................................... 134
12.2.6.Special Function Registers .................................................................... 135
12.2.7.Register Descriptions ............................................................................. 150
12.3.Interrupt Handler............................................................................................. 153
12.3.1.MCU Interrupt Sources and Vectors ...................................................... 153
12.3.2.External Interrupts.................................................................................. 154
12.3.3.Interrupt Priorities................................................................................... 156
12.3.4.Interrupt Latency .................................................................................... 156
12.3.5.Interrupt Register Descriptions............................................................... 156
12.4.Power Management Modes............................................................................ 163
12.4.1.Idle Mode ............................................................................................... 163
12.4.2.Stop Mode.............................................................................................. 164
13. Reset Sources....................................................................................................... 165
13.1.Power-On Reset ............................................................................................. 166
13.2.Power-Fail Reset ............................................................................................ 166
13.3.External Reset ................................................................................................ 166
13.4.Missing Clock Detector Reset ........................................................................ 167
13.5.Comparator0 Reset ........................................................................................ 167
13.6.External CNVSTR0 Pin Reset ........................................................................ 167
13.7.Watchdog Timer Reset................................................................................... 167
13.7.1.Enable/Reset WDT ................................................................................ 168
13.7.2.Disable WDT .......................................................................................... 168
13.7.3.Disable WDT Lockout ............................................................................ 168
13.7.4.Setting WDT Interval .............................................................................. 168
14. Oscillators ............................................................................................................. 173
14.1.Programmable Internal Oscillator ................................................................... 173
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Rev. 1.6
C8051F040/1/2/3/4/5/6/7
14.2.External Oscillator Drive Circuit...................................................................... 175
14.3.System Clock Selection.................................................................................. 175
14.4.External Crystal Example ............................................................................... 177
14.5.External RC Example ..................................................................................... 178
14.6.External Capacitor Example ........................................................................... 178
15. Flash Memory ....................................................................................................... 179
15.1.Programming The Flash Memory ................................................................... 179
15.2.Non-volatile Data Storage .............................................................................. 180
15.3.Security Options ............................................................................................. 180
15.3.1.Summary of Flash Security Options....................................................... 183
16. External Data Memory Interface and On-Chip XRAM........................................ 187
16.1.Accessing XRAM............................................................................................ 187
16.1.1.16-Bit MOVX Example ........................................................................... 187
16.1.2.8-Bit MOVX Example ............................................................................. 187
16.2.Configuring the External Memory Interface .................................................... 188
16.3.Port Selection and Configuration.................................................................... 188
16.4.Multiplexed and Non-multiplexed Selection.................................................... 191
16.4.1.Multiplexed Configuration....................................................................... 191
16.4.2.Non-multiplexed Configuration............................................................... 192
16.5.Memory Mode Selection................................................................................. 193
16.5.1.Internal XRAM Only ............................................................................... 193
16.5.2.Split Mode without Bank Select.............................................................. 193
16.5.3.Split Mode with Bank Select................................................................... 194
16.5.4.External Only.......................................................................................... 194
16.6.Timing .......................................................................................................... 194
16.6.1.Non-multiplexed Mode ........................................................................... 196
16.6.2.Multiplexed Mode ................................................................................... 199
17. Port Input/Output.................................................................................................. 203
17.1.Ports 0 through 3 and the Priority Crossbar Decoder..................................... 204
17.1.1.Crossbar Pin Assignment and Allocation ............................................... 205
17.1.2.Configuring the Output Modes of the Port Pins...................................... 206
17.1.3.Configuring Port Pins as Digital Inputs................................................... 206
17.1.4.Weak Pullups ......................................................................................... 207
17.1.5.Configuring Port 1, 2, and 3 Pins as Analog Inputs ............................... 207
17.1.6.External Memory Interface Pin Assignments ......................................... 208
17.1.7.Crossbar Pin Assignment Example........................................................ 210
17.2.Ports 4 through 7 ............................................................................................ 220
17.2.1.Configuring Ports Which are Not Pinned Out......................................... 221
17.2.2.Configuring the Output Modes of the Port Pins...................................... 221
17.2.3.Configuring Port Pins as Digital Inputs................................................... 221
17.2.4.Weak Pullups ......................................................................................... 221
17.2.5.External Memory Interface ..................................................................... 221
18. Controller Area Network (CAN0) ......................................................................... 227
18.1.Bosch CAN Controller Operation.................................................................... 228
18.1.1.CAN Controller Timing ........................................................................... 229
Rev. 1.6
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