EFM32 Jade Gecko Family
EFM32JG1 Data Sheet
The EFM32 Jade Gecko MCUs are the world’s most energy-
friendly microcontrollers.
EFM32JG1 features a powerful 32-bit ARM
®
Cortex
®
-M3 and a wide selection of periph-
erals, including a unique cryptographic hardware engine supporting AES, ECC, and
SHA. These features, combined with ultra-low current active mode and short wake-up
time from energy-saving modes, make EFM32JG1 microcontrollers well suited for any
battery-powered application, as well as other systems requiring high performance and
low-energy consumption.
Example applications:
• IoT devices and sensors
• Health and fitness
• Smart accessories
• Home automation and security
• Industrial and factory automation
ENERGY FRIENDLY FEATURES
• ARM Cortex-M3 at 40 MHz
• Ultra low energy operation:
• 2.1 μA EM3 Stop current (CRYOTIMER
running with state/RAM retention)
• 2.5 μA EM2 DeepSleep current (RTCC
running with state and RAM retention)
• 63 μA/MHz in Energy Mode 0 (EM0)
• Hardware cryptographic engine supports
AES, ECC, and SHA
• Integrated dc-dc converter
• CRYOTIMER operates down to EM4
• 5 V tolerant I/O
Core / Memory
Clock Management
High Frequency
Crystal
Oscillator
Low Frequency
RC Oscillator
DMA Controller
Low Frequency
Crystal
Oscillator
High Frequency
RC Oscillator
Auxiliary High
Frequency RC
Oscillator
Ultra Low
Frequency RC
Oscillator
Energy Management
Voltage
Regulator
DC-DC
Converter
Brown-Out
Detector
Voltage Monitor
ARM Cortex
TM
M3 processor
Memory
Protection Unit
Power-On Reset
Flash Program
Memory
RAM Memory
Debug Interface
32-bit bus
Peripheral Reflex System
Serial Interfaces
USART
I/O Ports
External Interrupts
General Purpose I/O
Timers and Triggers
Timer/Counter
Low Energy Timer
Real Time Counter
and Calendar
CRYOTIMER
Analog Interfaces
ADC
Other
CRYPTO
Low Energy UART
TM
Pulse Counter
Analog Comparator
CRC
Pin Reset
I
2
C
Pin Wakeup
Watchdog Timer
IDAC
Lowest power mode with peripheral operational:
EM0 - Active
EM1 - Sleep
EM2 – Deep Sleep
EM3 - Stop
EM4 - Hibernate
EM4 - Shutoff
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Rev. 1.1
EFM32JG1 Data Sheet
Feature List
1. Feature List
The EFM32JG1 highlighted features are listed below.
•
ARM Cortex-M3 CPU platform
• High Performance 32-bit processor @ up to 40 MHz
• Memory Protection Unit
• Wake-up Interrupt Controller
•
Flexible Energy Management System
• 63 μA/MHz in Energy Mode 0 (EM0)
• 2.5 μA EM2 DeepSleep current (RTCC running with state
and RAM retention)
• 0.58 μA EM4H Hibernate Mode (128 byte RAM retention)
•
Up to 256 kB flash program memory
•
32 kB RAM data memory
•
Up to 32 General Purpose I/O Pins
• Configurable push-pull, open-drain, pull-up/down, input fil-
ter, drive strength
• Configurable peripheral I/O locations
• Asynchronous external interrupts
• Output state retention and wake-up from Shutoff Mode
•
Hardware Cryptography
• AES 128/256-bit keys
• ECC B/K163, B/K233, P192, P224, P256
• SHA-1 and SHA-2 (SHA-224 and SHA-256)
•
Timers/Counters
• 2× 16-bit Timer/Counter
• 3 + 4 Compare/Capture/PWM channels
• 1× 32-bit Real Time Counter and Calendar
• 1× 32-bit Ultra Low Energy CRYOTIMER for periodic wake-
up from any Energy Mode
• 16-bit Low Energy Timer for waveform generation
• 16-bit Pulse Counter with asynchronous operation
• Watchdog Timer with dedicated RC oscillator
•
8 Channel DMA Controller
•
12 Channel Peripheral Reflex System (PRS) for autono-
mous inter-peripheral signaling
•
Communication Interfaces
• 2× Universal Synchronous/Asynchronous Receiver/ Trans-
mitter
• UART/SPI/SmartCard (ISO 7816)/IrDA/I2S/LIN
• Triple buffered full/half-duplex operation with flow control
• Low Energy UART
• Autonomous operation with DMA in Deep Sleep Mode
• I
2
C Interface with SMBus support
•
• Address recognition in EM3 Stop Mode
Ultra Low-Power Precision Analog Peripherals
• 12-bit 1 Msamples/s Analog to Digital Converter
• 2× Analog Comparator
• Digital to Analog Current Converter
• Up to 32 pins connected to analog channels (APORT)
shared between Analog Comparators, ADC, and IDAC
Ultra efficient Power-on Reset and Brown-Out Detector
Debug Interface
• 2-pin Serial Wire Debug interface
• 1-pin Serial Wire Viewer
• JTAG (programming only)
Wide Operating Range
• 1.85 V to 3.8 V single power supply
• Integrated dc-dc, down to 1.8 V output with up to 200 mA
load current for system
• Standard (-40 °C to 85 °C T
AMB
) and Extended (-40 °C to
125 °C T
J
) temperature grades available
•
•
•
•
Packages
• 7 mm × 7 mm QFN48
• 5 mm × 5 mm QFN32
•
Pre-Programmed UART Bootloader
•
Full Software Support
• CMSIS register definitions
• Low-power Hardware Abstraction Layer (HAL)
• Portable software components
• Third-party middleware
• Free and available example code
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Rev. 1.1 | 1
EFM32JG1 Data Sheet
Ordering Information
2. Ordering Information
Ordering Code
EFM32JG1B200F256GM48-C0
EFM32JG1B200F256IM48-C0
EFM32JG1B200F128GM48-C0
EFM32JG1B200F256GM32-C0
EFM32JG1B200F256IM32-C0
EFM32JG1B200F128GM32-C0
EFM32JG1B100F256GM32-C0
EFM32JG1B100F256IM32-C0
EFM32JG1B100F128GM32-C0
Flash
(kB)
256
256
128
256
256
128
256
256
128
RAM (kB)
32
32
32
32
32
32
32
32
32
DC-DC Converter
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
GPIO
32
32
32
20
20
20
24
24
24
Package
QFN48
QFN48
QFN48
QFN32
QFN32
QFN32
QFN32
QFN32
QFN32
Temp
Range
-40 to +85
-40 to +125
-40 to +85
-40 to +85
-40 to +125
-40 to +85
-40 to +85
-40 to +125
-40 to +85
EFM32 J G 1 B 200 F 256 G M 32
–
C0 R
Tape and Reel (Optional)
Revision
Pin Count
Package
–
M (QFN)
Temperature Grade
–
G (-40 to +85 °C), I (-40 to +125 °C)
Flash Memory Size in kB
Memory Type (Flash)
Feature Set Code
Performance Grade
–
P (Performance), B (Basic), V (Value)
Series
Gecko
Family
–
J (Jade), P (Pearl)
Energy Friendly Microcontroller 32-bit
Figure 2.1. OPN Decoder
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Rev. 1.1 | 2
EFM32JG1 Data Sheet
System Overview
3. System Overview
3.1 Introduction
The EFM32JG1 product family is well suited for any battery operated application as well as other systems requiring high performance
and low energy consumption. This section gives a short introduction to the MCU system. The detailed functional description can be
found in the EFM32JG1 Reference Manual.
A block diagram of the EFM32JG1 family is shown in
Figure 3.1 Detailed EFM32JG1 Block Diagram on page 3.
The diagram shows
a superset of features available on the family, which vary by OPN. For more information about specific device features, consult
Order-
ing Information.
ARM Cortex-M3 Core
Serial Wire
(shared w/ GPIO)
RESETn
Debug /
Programming
Hardware
Up to 256 KB ISP Flash
Program Memory
Up to 32 KB RAM
Memory Protection Unit
DMA Controller
Port I/O Configuration
Digital Peripherals
LETIMER
TIMER
CRYOTIMER
PCNT
RTC / RTCC
USART
LEUART
I2C
Port
Mapper
Port B
Drivers
PBn
Port A
Drivers
PAn
IOVDD
Reset
Reset
Management
Unit
Voltage
Monitor / Brown
Out Detector
DVDD
Power Net
bypass
VREGVDD
VREGSW
VREGVSS
DC-DC
Converter
Watchdog
Timer
A A
H P
B B
CRYPTO
CRC
Port C
Drivers
PCn
Clock Configuration
VSS
ULFRCO
LFXTAL_P
LFXTAL_N
(shared w/ GPIO)
LFXO
HFRCO
Analog Peripherals
Internal
Reference
VDD
VREF
VDD
IDAC
Port D
Drivers
PDn
Port F
Drivers
Input MUX
PFn
12-bit ADC
HFXTAL_P
HFXTAL_N
HFXO
AUXHFRCO
LFRCO
Temp
Sensor
+
-
Analog Comparator
Figure 3.1. Detailed EFM32JG1 Block Diagram
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APORT
Rev. 1.1 | 3
EFM32JG1 Data Sheet
System Overview
3.2 Power
The EFM32JG1 has an Energy Management Unit (EMU) and efficient integrated regulators to generate internal supply voltages. Only a
single external supply voltage is required, from which all internal voltages are created. An optional integrated dc-dc buck regulator can
be utilized to further reduce the current consumption. The dc-dc regulator requires one external inductor and one external capacitor.
AVDD and VREGVDD need to be 1.85 V or higher for the MCU to operate across all conditions; however the rest of the system will
operate down to 1.62 V, including the digital supply and I/O. This means that the device is fully compatible with 1.8 V components.
Running from a sufficiently high supply, the device can use the dc-dc to regulate voltage not only for itself, but also for other PCB com-
ponents, supplying up to a total of 200 mA.
3.2.1 Energy Management Unit (EMU)
The Energy Management Unit manages transitions of energy modes in the device. Each energy mode defines which peripherals and
features are available and the amount of current the device consumes. The EMU can also be used to turn off the power to unused RAM
blocks, and it contains control registers for the DC-DC regulator and the Voltage Monitor (VMON). The VMON is used to monitor multi-
ple supply voltages. It has multiple channels which can be programmed individually by the user to determine if a sensed supply has
fallen below a chosen threshold.
3.2.2 DC-DC Converter
The DC-DC buck converter covers a wide range of load currents and provides up to 90% efficiency in energy modes EM0, EM1, EM2
and EM3, and can supply up to 200 mA to the device and surrounding PCB components. Protection features include programmable
current limiting, short-circuit protection, and dead-time protection. The DC-DC converter may also enter bypass mode when the input
voltage is too low for efficient operation. In bypass mode, the DC-DC input supply is internally connected directly to its output through a
low resistance switch. Bypass mode also supports in-rush current limiting to prevent input supply voltage droops due to excessive out-
put current transients.
3.3 General Purpose Input/Output (GPIO)
EFM32JG1 has up to 32 General Purpose Input/Output pins. Each GPIO pin can be individually configured as either an output or input.
More advanced configurations including open-drain, open-source, and glitch-filtering can be configured for each individual GPIO pin.
The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral connection can be routed to sev-
eral GPIO pins on the device. The input value of a GPIO pin can be routed through the Peripheral Reflex System to other peripherals.
The GPIO subsystem supports asynchronous external pin interrupts.
3.4 Clocking
3.4.1 Clock Management Unit (CMU)
The Clock Management Unit controls oscillators and clocks in the EFM32JG1. Individual enabling and disabling of clocks to all periph-
eral modules is performed by the CMU. The CMU also controls enabling and configuration of the oscillators. A high degree of flexibility
allows software to optimize energy consumption in any specific application by minimizing power dissipation in unused peripherals and
oscillators.
3.4.2 Internal and External Oscillators
The EFM32JG1 supports two crystal oscillators and fully integrates four RC oscillators, listed below.
• A high frequency crystal oscillator (HFXO) with integrated load capacitors, tunable in small steps, provides a precise timing refer-
ence for the MCU. Crystal frequencies in the range from 38 to 40 MHz are supported. An external clock source such as a TCXO can
also be applied to the HFXO input for improved accuracy over temperature.
• A 32.768 kHz crystal oscillator (LFXO) provides an accurate timing reference for low energy modes.
• An integrated high frequency RC oscillator (HFRCO) is available for the MCU system, when crystal accuracy is not required. The
HFRCO employs fast startup at minimal energy consumption combined with a wide frequency range.
• An integrated auxilliary high frequency RC oscillator (AUXHFRCO) is available for timing the general-purpose ADC and the Serial
Wire debug port with a wide frequency range.
• An integrated low frequency 32.768 kHz RC oscillator (LFRCO) can be used as a timing reference in low energy modes, when crys-
tal accuracy is not required.
• An integrated ultra-low frequency 1 kHz RC oscillator (ULFRCO) is available to provide a timing reference at the lowest energy con-
sumption in low energy modes.
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