C8051F2xx
8K ISP FLASH MCU Family
Analog Peripherals
-
SAR ADC
•
•
•
•
•
12-bit resolution ('F206)
8-bit resolution ('F220/1/6)
±1/4 LSB INL (8-bit) and ±2 LSB INL (12-bit)
Up to 100 ksps
Up to 32 channel input multiplexer; each port
I/O pin can be an ADC input
16 programmable hysteresis states
Configurable to generate interrupts or reset
Memory
-
256 bytes internal data RAM
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1024 bytes XRAM (available on 'F206/226/236)
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8 kB Flash; In-system programmable in 512 byte
sectors
-
Two Comparators
•
•
-
V
DD
monitor and brown-out detector
On-Chip JTAG Debug
-
On-chip debug circuitry facilitates full speed,
-
-
-
-
non-intrusive in-system debug (No emulator
required)
Provides breakpoints, single-stepping, watchpoints,
stack monitor
Inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Complete, low cost development kit
Digital Peripherals
-
Four byte wide Port I/O; All are 5 V tolerant
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Hardware UART and SPI bus
-
3 general purpose 16-bit counter/timers
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Dedicated watch-dog timer
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Bi-directional reset
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System clock: internal programmable oscillator,
external crystal, external RC, or external clock
Supply Voltage
2.7 to 3.6 V
-
Typical operating current: 10 mA @ 25 MHz
-
Multiple power saving sleep and shutdown modes
(48-Pin TQFP and 32-Pin LQFP Version
Available)
Temperature Range: –40 to +85 °C
High Speed
-
8051 mC Core
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Pipelined Instruction Architecture; Executes 70% of
-
-
Instructions in 1 or 2 System Clocks
Up to 25MIPS Throughput with 25MHz Clock
Expanded Interrupt Handler
ANALOG PERIPHERALS
AMUX
DIGITAL I/O
SPI Bus
PGA
SAR
Digital MUX
Timer 0
+
-
+
-
Timer 1
VOLTAGE
COMPARATORS
Timer 2
HIGH-SPEED CONTROLLER CORE
8051 CPU
CLOCK
EMULATION
JTAG
(25MIPS)
CIRCUIT
CIRCUITRY
8K x 8
SANITY
1280 x 8
22 INTERRUPTS
SRAM
ISP FLASH
CONTROL
Rev. 1.6
3/05
Copyright © 2005 by Silicon Laboratories
Port 3
Port 2
Port 1
ADC
UART
Port 0
C8051F2xx
C8051F2xx
N
OTES
:
2
Rev. 1.6
C8051F2xx
Table of Contents
1. System Overview.................................................................................................... 11
1.1. CIP-51TM Microcontroller Core ........................................................................ 15
1.1.1. Fully 8051 Compatible.............................................................................. 15
1.1.2. Improved Throughput ............................................................................... 15
1.1.3. Additional Features .................................................................................. 16
1.2. On-Board Memory ............................................................................................ 17
1.3. JTAG ............................................................................................................ 18
1.4. Digital/Analog Configurable I/O......................................................................... 19
1.5. Serial Ports ....................................................................................................... 20
1.6. Analog to Digital Converter ............................................................................... 20
1.7. Comparators ..................................................................................................... 21
2. Absolute Maximum Ratings .................................................................................. 23
3. Global DC Electrical Characteristics .................................................................... 24
4. Pinout and Package Definitions............................................................................ 25
5. ADC (8-Bit, C8051F220/1/6 Only)........................................................................... 32
5.1. Analog Multiplexer and PGA............................................................................. 32
5.2. ADC Modes of Operation.................................................................................. 33
5.3. ADC Programmable Window Detector ............................................................. 37
6. ADC (12-Bit, C8051F206 Only)............................................................................... 40
6.1. Analog Multiplexer and PGA............................................................................. 40
6.2. ADC Modes of Operation.................................................................................. 41
6.3. ADC Programmable Window Detector ............................................................. 46
7. Voltage Reference (C8051F206/220/221/226) ....................................................... 50
8. Comparators ........................................................................................................... 52
9. CIP-51 Microcontroller ........................................................................................... 58
9.1. Instruction Set ................................................................................................... 60
9.1.1. Instruction and CPU Timing ..................................................................... 60
9.1.2. MOVX Instruction and Program Memory ................................................. 60
9.2. Memory Organization........................................................................................ 65
9.2.1. Program Memory...................................................................................... 65
9.2.2. Data Memory............................................................................................ 65
9.2.3. General Purpose Registers ...................................................................... 66
9.2.4. Bit Addressable Locations........................................................................ 66
9.2.5. Stack ....................................................................................................... 67
9.3. Special Function Registers ............................................................................... 68
9.3.1. Register Descriptions ............................................................................... 71
9.4. Interrupt Handler ............................................................................................... 74
9.4.1. MCU Interrupt Sources and Vectors ........................................................ 74
9.4.2. External Interrupts .................................................................................... 74
9.4.3. Software Controlled Interrupts.................................................................. 74
9.4.4. Interrupt Priorities ..................................................................................... 76
9.4.5. Interrupt Latency ...................................................................................... 76
9.4.6. Interrupt Register Descriptions................................................................. 77
Rev. 1.6
3
C8051F2xx
9.5. Power Management Modes .............................................................................. 83
9.5.1. Idle Mode.................................................................................................. 83
9.5.2. Stop Mode ................................................................................................ 83
10. Flash Memory ......................................................................................................... 85
10.1.Programming The Flash Memory ..................................................................... 85
10.2.Security Options ............................................................................................... 86
11. On-Chip XRAM (C8051F206/226/236).................................................................... 90
12. Reset Sources......................................................................................................... 91
12.1.Power-on Reset................................................................................................ 92
12.2.Software Forced Reset..................................................................................... 92
12.3.Power-fail Reset ............................................................................................... 92
12.4.External Reset .................................................................................................. 93
12.5.Missing Clock Detector Reset .......................................................................... 93
12.6.Comparator 0 Reset ......................................................................................... 93
12.7.Watchdog Timer Reset..................................................................................... 93
12.7.1.Watchdog Usage...................................................................................... 93
13. Oscillator ................................................................................................................. 97
13.1.External Crystal Example ............................................................................... 100
13.2.External RC Example ..................................................................................... 100
13.3.External Capacitor Example ........................................................................... 100
14. Port Input/Output.................................................................................................. 101
14.1.Port I/O Initialization ....................................................................................... 101
14.2.General Purpose Port I/O ............................................................................... 105
15. Serial Peripheral Interface Bus ........................................................................... 110
15.1.Signal Descriptions......................................................................................... 111
15.1.1.Master Out, Slave In .............................................................................. 111
15.1.2.Master In, Slave Out .............................................................................. 111
15.1.3.Serial Clock ............................................................................................ 111
15.1.4.Slave Select ........................................................................................... 111
15.2.Serial Clock Timing......................................................................................... 113
15.3.SPI Special Function Registers ...................................................................... 113
16. UART...................................................................................................................... 117
16.1.UART Operational Modes .............................................................................. 118
16.1.1.Mode 0: Synchronous Mode .................................................................. 118
16.1.2.Mode 1: 8-Bit UART, Variable Baud Rate.............................................. 119
16.1.3.Mode 2: 9-Bit UART, Fixed Baud Rate .................................................. 121
16.1.4.Mode 3: 9-Bit UART, Variable Baud Rate.............................................. 121
16.2.Multiprocessor Communications .................................................................... 122
17. Timers.................................................................................................................... 125
17.1.Timer 0 and Timer 1 ....................................................................................... 125
17.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 125
17.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 126
17.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 127
17.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 128
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Rev. 1.6
C8051F2xx
17.2.Timer 2 .......................................................................................................... 133
17.2.1.Mode 0: 16-bit Counter/Timer with Capture ........................................... 134
17.2.2.Mode 1: 16-bit Counter/Timer with Auto-Reload.................................... 135
17.2.3.Mode 2: Baud Rate Generator ............................................................... 136
18. JTAG ...................................................................................................................... 139
18.1.Flash Programming Commands..................................................................... 140
18.2.Boundary Scan Bypass and ID Code ............................................................. 143
18.2.1.BYPASS Instruction ............................................................................... 143
18.2.2.IDCODE Instruction................................................................................ 143
18.3.Debug Support ............................................................................................... 143
Contact Information.................................................................................................. 144
Rev. 1.6
5
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