电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SI52142-A01AGMR

产品描述PCI Express(PCIe) IC 200MHz 1 输出 24-QFN(4x4)
产品类别半导体    时钟与计时   
文件大小2MB,共23页
制造商Skyworks(思佳讯)
官网地址http://www.skyworksinc.com
下载文档 详细参数 全文预览

SI52142-A01AGMR在线购买

供应商 器件名称 价格 最低购买 库存  
SI52142-A01AGMR - - 点击查看 点击购买

SI52142-A01AGMR概述

PCI Express(PCIe) IC 200MHz 1 输出 24-QFN(4x4)

SI52142-A01AGMR规格参数

参数名称属性值
类别
厂商名称Skyworks(思佳讯)
包装卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带
PLL
主要用途PCI Express(PCIe)
输入时钟,晶体
输出HCSL
电路数1
比率 - 输入:输出1:3
差分 - 输入:输出无/是
频率 - 最大值200MHz
电压 - 供电3.135V ~ 3.465V
工作温度-40°C ~ 85°C
安装类型表面贴装型
封装/外壳24-WFQFN 裸露焊盘
供应商器件封装24-QFN(4x4)
基本产品编号SI52142

文档预览

下载PDF文档
Si 52142xx
PC I- E
XPRESS
G
EN
1 , G
EN
2 , & G
E N
3 T
WO
-O
UTP UT
C
L OCK
G
ENERATOR WITH
2 5 MH
Z
R
E F E R E N C E
C
LOCK
Features
PCI-Express Gen 1, Gen 2, Gen 3,
and Gen 4 common clock compliant
Gen 3 SRNS Compliant
Two 100 MHz, 125 MHz, or 200 MHz
differential clock outputs
Supports Serial ATA (SATA) at
100 MHz
Low power, push-pull HCSL
compatible differential outputs
No termination resistors required
Dedicated output enable hardware
pins for each clock output
Dedicated hardware pins for spread
spectrum and frequency control on
differential outputs
Up to two PCI-Express clocks
25 MHz reference clock output
25 MHz crystal input or clock input
Signal integrity tuning
I
2
C support with readback
capabilities
Triangular spread spectrum profile
for maximum electromagnetic
interference (EMI) reduction
Industrial temperature
–40 to 85 °C
3.3 V power supply
24-pin QFN package
Ordering Information:
See page 18.
Pin Assignments
Applications
Network attached storage
Multi-function printer
Wireless access point
Routers
VDD_REF
REF
1
2
3
4
5
6
VDD_CORE
VSS_CORE
XIN/CLKIN
SDATA
20
24
23
22
XOUT
21
Description
The Si52142 is a spread-spectrum enabled PCIe clock generator that can source
two PCIe clocks and a 25 MHz reference clock. The device has three hardware
output enable pins for enabling the respective outputs, and two hardware pins to
control spread spectrum and frequency on PCIe clock outputs. In addition to the
hardware control pins, I
2
C programmability is also available to dynamically control
skew, edge rate, and amplitude on the true, compliment, or both differential
signals on the PCIe clock outputs. This control feature enables optimal signal
integrity as well as optimal EMI signature on the PCIe clock outputs.
Refer to AN636 for signal integrity and configurability. Measuring PCIe clock jitter
is quick and easy with the Skyworks Solutions PCIe Clock Jitter Tool. Download it
for free at
https://www.skyworksinc.com/en/application-pages/pci-express-learn-
ing-center.
SCLK
19
1
18 OE_DIFF1
17 VDD_DIFF
16 DIFF1
15 DIFF1
14 DIFF0
13 DIFF0
7
8
9
10
11
12
OE_REF
1
VSS_REF
OE_DIFF0
1
VDD_DIFF
25
GND
NC
NC
Notes:
1. Internal 100 kohm pull-up.
2. Internal 100 kohm pull-down.
Patents pending
Functional Block Diagram
XIN/CLKIN
XOUT
REF
DIFF0
PLL1
(SSC)
Divider
DIFF1
SCLK
SDATA
OE_REF
OE [1:0]
SS [1:0]
Control & Memory
Control
RAM
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
Rev. 1.4 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 23, 2021
VDD_DIFF
SS0
2
SS1
NC
2

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2751  1990  2040  910  2092  56  41  42  19  43 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved