Si4730/31-D50
B
ROADCAST
AM/FM R
ADIO
R
ECEIVER
Features
Worldwide FM band support
No manual alignment necessary
Programmable reference clock
Volume control
Adjustable soft mute control
RDS/RBDS processor (Si4731 only)
I
2
S digital audio out
2-wire and 3-wire control interface
Integrated LDO regulator
Wide range of ferrite loop sticks and
GPO3/DCLK
17
10
VD
GPO2/INT
GPO1
(64–108 MHz)
Worldwide AM band support
(520–1710 kHz)
Excellent real-world performance
Integrated VCO
Advanced AM/FM seek tuning
AM/FM digital tuning
Automatic frequency control (AFC)
Automatic gain control (AGC)
Digital FM stereo decoder
Programmable AVC max gain
Programmable de-emphasis
Seven selectable AM channel filters
Advanced audio processing
Ordering Information:
See page 26.
Pin Assignments
Si4730/31
air loop antennas supported
QFN package
RoHS compliant
Not suitable for wall-plugged
consumer electronic applications*
*Note:
For consumer electronics applications, use Si4730/31-D60 for worldwide
CE and EN compliance.
NC
1
20
19
18
Applications
Cellular handsets
MP3 players
Portable navigation
FMI 2
Mobile Internet Devices
Tablets
USB FM radio
eBooks
RFGND 3
AMI 4
RST 5
6
SEN
7
SCLK
GND
PAD
8
SDIO
9
RCLK
Description
The Si4730/31-D50 is the fourth generation digtial CMOS AM/FM radio receiver
IC from Silicon Labs. The Si4730/31-D50 integrates the complete tuner function
from antenna input to audio output.
Functional Block Diagram
Si473x
AMI
AM
ANT
RFGND
LNA
AGC
ADC
FMI
LNA
AGC
2.7– 5.5 V
VA
GND
LDO
AFC
ADC
DSP
DAC
LOUT
RDS
(Si4731)
LOW-IF
DAC
DOUT
DIGITAL
AUDIO
DFS
GPO/DCLK
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
7,272,373;
7,272,375;
7,321,324;
7,355,476;
7,426,376;
7,471,940;
7,339,503; 7,339,504.
FM
ANT
ROUT
CONTROL
INTERFACE
VD
1.62–3.6 V
SDIO
Rev. 1.0 2/11
Copyright © 2011 by Silicon Laboratories
RCLK
SCLK
SEN
RST
Si4730/31-D50
DFS
16
15 DOUT
14 LOUT
13 ROUT
12 GND
11 VA
NC
Si4730/31-D50
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.4. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.5. Digital Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.6. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.7. Received Signal Qualifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.8. De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.9. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.10. Stereo DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.11. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.12. FM Hi-Cut Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.13. RDS/RBDS Processor (Si4731 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.14. Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.15. Seek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.16. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.17. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.18. GPO Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.19. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
4.20. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.21. Programming with Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5. Pin Descriptions: Si4730/31-GM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7. Package Markings (Top Marks) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.1. Si4730/31 Top Mark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.2. Top Mark Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8. Package Outline: Si4730/31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9. PCB Land Pattern: Si4730/31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
10. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Document Change List: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Rev. 1.0
3
Si4730/31-D50
1. Electrical Specifications
Table 1. Recommended Operating Conditions*
Parameter
Analog Supply Voltage
Digital and I/O Supply Voltage
Analog Power Supply Powerup Rise
Time
Digital Power Supply Powerup Rise
Time
Ambient Temperature
Symbol
V
A
V
D
V
ARISE
V
DRISE
T
A
Test Condition
Min
2.7
1.62
10
10
–20
Typ
—
—
—
—
25
Max
5.5
3.6
—
—
85
Unit
V
V
µs
µs
C
*Note:
All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.
Typical values apply at V
A
= 3.3 V and 25
C
unless otherwise stated. Parameters are tested in production unless
otherwise stated.
Table 2. Absolute Maximum Ratings
1,2
Parameter
Analog Supply Voltage
Digital and I/O Supply Voltage
Input Current
3
Input Voltage
3
Operating Temperature
Storage Temperature
RF Input Level
4
Symbol
V
A
V
D
I
IN
V
IN
T
OP
T
STG
Value
–0.5 to 5.8
–0.5 to 3.9
10
–0.3 to (V
IO
+ 0.3)
–40 to 95
–55 to 150
0.4
Unit
V
V
mA
V
C
C
V
pK
Notes:
1.
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2.
The Si4730/31 device is a high-performance RF integrated circuit with certain pins having an ESD rating of < 2 kV
HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3.
For input pins DFS, SCLK, SEN, SDIO, RST, RCLK, GPO1, GPO2, GPO3, and DCLK.
4.
At RF input pins FMI and AMI.
4
Rev. 1.0
Si4730/31-D50
Table 3. DC Characteristics
(V
A
= 2.7 to 5.5 V, V
D
= 1.62 to 3.6 V, T
A
= –20 to 85 °C)
Parameter
FM Mode
V
A
Supply Current
V
D
Supply Current
V
D
Supply Current
AM Mode
V
A
Supply Current
V
D
Supply Current
V
D
Supply Current
Powerdown and Interface
V
A
Powerdown Current
V
D
Powerdown Current
High Level Input Voltage
2
Low Level Input Voltage
2
High Level Input Current
2
Low Level Input Current
2
High Level Output Voltage
3
Low Level Output Voltage
3
Symbol
Test Condition
Min
Typ
Max
Unit
I
FMVA
I
FMVD
I
FMVD
I
AMVA
I
AMVD
I
AMVD
I
APD
I
DOPD
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
V
IN
= V
D
= 3.6 V
V
IN
= 0 V,
V
D
= 3.6 V
I
OUT
= 500 µA
I
OUT
= –500 µA
SCLK, RCLK inactive
Digital Output Mode
1
Analog Output Mode
Digital Output Mode
1
Analog Output Mode
—
—
—
7.5
8.5
8.4
9.7
11.1
11.1
mA
mA
mA
—
—
—
7.5
8.5
8.0
8.5
11.0
10.2
mA
mA
mA
—
—
0.7 x V
D
–0.3
–10
–10
0.8 x V
D
—
4
3
—
—
—
—
—
—
15
10
V
D
+ 0.3
0.3 x V
D
10
10
—
0.2 x V
D
µA
µA
V
V
µA
µA
V
V
Notes:
1.
Guaranteed by characterization.
2.
For input pins SCLK, SEN, SDIO, RST, RCLK, DCLK, DFS, GPO1, GPO2, and GPO3.
3.
For output pins SDIO, DOUT, GPO1, GPO2, and GPO3.
Rev. 1.0
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
