S i 5 2 11 2 - B 5 / B 6
P C I - E
X P R E S S
G
EN
3
D U A L
O
U TP U T
C
LOC K
G
EN ERATOR
Features
PCI-Express Gen 1, Gen 2, and
Gen 3 common clock compliant
Gen 3 SRNS Compliant
Low power HCSL differential
output buffers
Supports Serial-ATA (SATA) at
100 MHz
No termination resistors required
25 MHz Crystal Input or Clock
input
Triangular spread spectrum profile
for maximum EMI reduction
(Si52112-B6)
Extended Temperature:
–40 to 85 °C
3.3 V Power supply
Small packages:
8-pin TDFN (1.4 x 1.6 mm)
10-pin TDFN (3 x 3 mm)
Si52112-B5 does not support
spread spectrum outputs
Si52112-B6 supports 0.5% down
spread outputs
Ordering Information:
See page 13
Patents pending
Applications
Network attached storage
Multi-function printer
PCIe Add-on Cards
Network Interface Cards
Docking Stations
Wireless access point
Routers
Digital Still Cameras
Digital Video Cameras
Description
Si52112-B5/B6 is a high-performance, PCIe clock generator that can source
two PCIe clocks from a 25 MHz crystal or clock input. The clock outputs are
compliant to PCIe Gen 1, Gen 2, Gen 3 common clock, and Gen 3 SRNS
specifications. The ultra-small footprint (1.4 x 1.6 mm) and industry leading
low power consumption make Si52112-B5/B6 the ideal clock solution for
applications with tight board space constraints. Measuring PCIe clock jitter is
quick and easy with the Skyworks Solutions PCIe Clock Jitter Tool. Download
it for free at
https://www.skyworksinc.com/en/Application-Pages/pcie-clock-jit-
ter-tool.
Functional Block Diagram
VDD
DIFF1
XIN/CLKIN
XOUT
PLL
Divider
DIFF2
VSS
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • August 31, 2021
Si52112-B5/B6
T
A B L E O F
C
O N T E N T S
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2. Crystal Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2.1. Crystal Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2.2. Calculating Load Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3. Test and Measurement Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1. 8-Pin TDFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4.2. 10-Pin TDFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3. 8-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6. Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
6.1. 8-Pin TDFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.2. 10-Pin TDFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.3. TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7. Recommended Design Guideline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
2
Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • August 31, 2021
Si52112-B5/B6
1. Electrical Specifications
Table 1. DC Electrical Specifications
Parameter
Operating Voltage
Operating Supply Current
Input Pin Capacitance
Output Pin Capacitance
Symbol
V
DD
I
DD
C
IN
C
OUT
Test Condition
3.3 V ± 5%
Full Active
Input Pin Capacitance
Output Pin Capacitance
Min
3.13
—
—
—
Typ
3.30
—
3
—
Max
3.46
17
5
5
Unit
V
mA
pF
pF
Table 2. AC Electrical Specifications
Parameter
Crystal
Long-term Accuracy
Clock Input
CLKIN Duty Cycle
CLKIN Rise and Fall Times
CLKIN Cycle-to-Cycle Jitter
CLKIN Long Term Jitter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
HCSL Clocks
Duty Cycle
Symbol
L
ACC
T
DC
T
R
/T
F
T
CCJ
T
LTJ
V
IH
V
IL
I
IH
I
IL
T
DC
T
SKEW
F
OUT
F
ACC
T
R
/T
F
T
CCJ
Pk-Pk
GEN1
Test Condition
Measured at V
DD
/2 differential
Measured at V
DD
/2
Measured between 0.2 V
DD
and 0.8 V
DD
Measured at V
DD
/2
Measured at V
DD
/2
XIN/CLKIN pin
XIN/CLKIN pin
XIN/CLKIN pin, VIN = V
DD
XIN/CLKIN pin, 0 < VIN <0.8
Measured at 0 V differential
Measured at 0 V differential
All output clocks
Measured differentially from
±150 mV
Measured at 0 V differential
PCIe Gen 1
10 kHz < F < 1.5 MHz
1.5 MHz < F < Nyquist
Min
—
45
0.5
—
—
2
—
—
–35
45
—
—
—
0.6
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
100
—
—
28
24
1.35
1.4
Max
250
55
4.0
250
350
V
DD
+0.3
0.8
35
—
55
60
—
100
4.0
70
86
3.0
3.1
Unit
ppm
%
V/ns
ps
ps
V
V
µA
µA
%
ps
MHz
ppm
V/ns
ps
ps
ps
ps
Output-to-Output Skew
Output Frequency
Frequency Accuracy
Slew Rate
Cycle-to-Cycle Jitter
PCIe Gen 1 Pk-Pk Jitter,
Common Clock
PCIe Gen 2 Phase Jitter,
Common Clock
RMS
GEN2
Notes:
1.
Visit
www.pcisig.com
for complete PCIe specifications.
2.
Download the Skyworks Solutions PCIe Clock Jitter Tool at
https://www.skyworksinc.com/en/Application-Pages/pcie-
clock-jitter-tool.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
3
Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • August 31, 2021
Si52112-B5/B6
Table 2. AC Electrical Specifications (Continued)
Parameter
PCIe Gen 3 Phase Jitter,
Common Clock
PCIe Gen 3 Phase Jitter,
Separate Reference No Spread,
SRNS
Crossing Point Voltage
Voltage High
Voltage Low
Spread Range
Modulation Frequency
Enable/Disable and Set-up
Clock Stabilization from Power-
up
Stopclock Set-up Time
T
STABLE
T
SS
—
10.0
—
—
3
—
ms
ns
Symbol
RMS
GEN3
RMS-
GEN3_SRNS
Test Condition
PLL BW of 2–4 or 2–5 MHz,
CDR = 10 MHz
PLL BW of 2–4 or 2–5 MHz,
CDR = 10 MHz
Min
—
—
Typ
0.4
0.28
Max
0.7
0.71
Unit
ps
ps
V
OX
V
HIGH
V
LOW
S
RNG
F
MOD
Down Spread, -B6 only
-B6 only
300
—
–0.3
—
30
—
—
—
–0.5
31.5
550
1.15
—
—
33
mV
V
V
%
kHz
Notes:
1.
Visit
www.pcisig.com
for complete PCIe specifications.
2.
Download the Skyworks Solutions PCIe Clock Jitter Tool at
https://www.skyworksinc.com/en/Application-Pages/pcie-
clock-jitter-tool.
Table 3. Thermal Conditions
Parameter
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
Dissipation, Junction to Case (8-TDFN)
Dissipation, Junction to Case (10-TDFN)
Dissipation, Junction to Case (TSSOP)
Dissipation, Junction to Ambient (8-TDFN)
Dissipation, Junction to Ambient (10-TDFN)
Dissipation, Junction to Ambient (TSSOP)
Symbol
T
S
T
A
T
J
Ø
JC
Ø
JC
Ø
JC
Ø
JA
Ø
JA
Ø
JA
Test Condition
Non-functional
Functional
Functional
JEDEC (JESD 51)
(2-Layers)
JEDEC (JESD 51)
(4-Layers)
JEDEC (JESD 51)
JEDEC (JESD 51)
(2-Layers)
JEDEC (JESD 51)
(4-Layers)
JEDEC (JESD 51)
Min
–65
–40
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
Max
150
85
125
98.8
38.3
37.0
170.8
90.4
Unit
°C
°C
°C
°C
°C/W
°C/W
°C
°C/W
124.0 °C/W
4
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • August 31, 2021
Si52112-B5/B6
Table 4. Absolute Maximum Conditions
Parameter
Main Supply Voltage
Input Voltage
ESD Protection (Human Body Model)
Flammability Rating
Symbol
V
DD_3.3V
V
IN
ESD
HBM
UL-94
Relative to V
SS
JEDEC (JESD 22 - A114)
UL (Class)
Test Condition
Min
—
–0.5
2000
Typ
—
—
—
V–0
Max
4.6
4.6
—
Unit
V
V
DC
V
Note:
While using multiple power supplies, the voltage on any input or I/O pin cannot exceed the power pin during powerup.
Power supply sequencing is not required
.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
5
Rev. 1.3 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • August 31, 2021
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