Si3460
IEEE 802.3af PSE I
NTERFACE
Features
AND
DC-DC C
ONTROLLER
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11
IEEE 802.3af™ compliant PSE and
dc-dc controller
Autonomous operation requires no
host processor interface
Complete reference design
available, including Si3460 controller,
PSE firmware, and schematic:
Low-cost BOM with compact PCB
footprint
Operates directly from a +12 or
+15 V isolated supply
DC-DC controller generates –48 V
PSE output for SELV compatibility
with telephony interfaces
Supports up to 15.4 W maximum
output power (Class 0)
Robust
3-point detection
algorithm eliminates false
detection events
IEEE-compliant classification
IEEE-compliant disconnect
Inrush current control
Short-circuit output fault
protection
LED status signal (detect,
power good, output fault)
UNH Interoperability Test Lab test
report available
Extended operating range
(–40 to +85 °C)
11-Pin Quad Flat No-Lead (QFN)
Tiny 3 x 3 mm PCB footprint;
Pb-free, RoHS-compliant
Pin Assignments
Si3460
GATE
1
2
3
4
5
11
10
9
8
7
6
STATUS
ISENSE
CTRL1
VDD
GND
RST
CTRL2
VSENSE
DETA
250KHZ
11
11-pin QFN (3x3 mm)
Top View—Pads on bottom of package
Applications
IEEE 802.3af endpoints and
midspans
Environment A and B PSEs
Embedded PSEs
Set-top boxes
FTTH media converters
Cable modem and DSL
gateways
Description
The Si3460 is a single-port, –48 V power management controller for
IEEE 802.3af-compliant Power Sourcing Equipment (PSE). Designed
to minimize system cost and ease implementation in embedded PSE
endpoint (switches) or midspan (power injector) applications, the
Si3460 operates directly from a 12 or 15 V input supply and integrates
a digital PWM-based dc-dc converter for generating the –48 V PSE
output supply. The IEEE-required Powered Device (PD) detection
feature uses a robust 3-point algorithm to avoid false detection events.
The Si3460's reference design kit also provides full IEEE-compliant
classification and PD disconnect. Intelligent protection circuitry
includes input undervoltage lockout (UVLO), classification-based
current limiting, and output short-circuit protection. The Si3460 is
designed to operate completely independently of host processor
control. An LED status signal is provided to indicate the port status,
including detect, power good, and output fault event information for
use within the host system. The Si3460 is pin-programmable to
support endpoint and midspan applications as well as each of the
different classification power levels specified by the IEEE 802.3af
standard. A comprehensive reference design kit is available (Si3460-
EVB), including a complete schematic and BOM (Bill-of-Materials) for
the dc-dc converter and PSE functions.
Rev. 1.2 3/13
Copyright © 2013 by Silicon Laboratories
11
Si3460
Si3460
Block Diagram
OTP
Memory
Osc.
PWM DC/DC
Controller:
UVLO,
Current Limiting,
Short Circuit
Protection
GATE
250KHZ
VSENSE
ISENSE
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RST
STATUS
State
Machine
Control
Config.
& LED
I/F
PSE
Controller:
CTRL1
CTRL2
Detection
Classification
Disconnect
DETA
2
Rev. 1.2
Si3460
T
ABLE
Section
OF
C
ONTENTS
Page
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Rev. 1.2
1. Si3460-EVB Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1. Si3460-EVB Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2. Si3460 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3. Si3460-EVB Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.1. PSE Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.2. DC-DC Converter Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4. Si3460-EVB Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1. Reset State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.2. Operating Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3. Operating Mode Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5. Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.1. Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2. External Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.3. Input DC Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
5.4. STATUS and RESET Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6. Si3460 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8. Package Outline: 11-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8.1. Solder Paste Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.2. PCB Landing Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8.3. Device Marking of Production Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
3
Si3460
1. Si3460-EVB Application Diagram
VDD
ISENSE
GATE
V
OUT
Detect
BOM
PWM
BOM
V
IN
RST
CTRL1
DETA
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CTRL2
VSENSE
GND
STATUS
+11V
to
16V
Si3460
-48 V
PSE
output
(to port
magnetics)
250KHZ
V
EE
DETECT
FAULT
PGOOD
Note: Refer to the Si3460-EVB User Guide for complete schematic details
Figure 1. Si3460-EVB Application Diagram
4
Rev. 1.2
Si3460
1.1. Si3460-EVB Performance Characteristics
When implemented according to the recommended external components and layout guidelines for the Si3460-
EVB, the Si3460 enables the following performance specifications in single-port PSE applications. Please refer to
the Si3460-EVB User’s Guide and schematics for details.
Table 1. Selected Electrical Specifications (Si3460-EVB)
Parameter
Power Supplies
V
IN
input supply range
V
IN
input UVLO voltage
VDD UVLO voltage
VDD supply voltage range
Output supply voltage
Supply current
V
IN
UVLO
V
DD
–40 to +85
°C
ambient range
UVLO turn-off voltage at V
IN
Si3460 supply voltage range
11
10
2.7
12, 15
—
3.3
—
16
—
3.6
—
V
V
V
Symbol
Test Condition
Min
Typ
Max
Unit
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V
DDmin
V
OUT
I
IN
Si3460 UVLO turn-off voltage
2.7
V
PSE output voltage at
V
IN
= 11 V (min) to 16 V (max)
–54
—
–50
5
–46
—
V
Current into V
DD
(including gate drive and detect)
mA
Detection Specifications
Minimum signature resistance
R
DETmin
15
17
19
33
k
Maximum signature resistance
R
DETmax
V
CLASS
I
CLASS
26.5
29
—
k
V
Classification Specifications
Classification voltage
Classification current limit
0 mA < I
CLASS
< 45 mA
Class 0
Class 1
Class 2
Class 3
Class 4
–20.5
55
0
8
–15.5
95
5
Measured with 200
across V
OUT
—
mA
—
mA
—
13
mA
Classification current region
I
CLASS
_
REGION
16
25
35
—
—
—
21
31
45
mA
mA
mA
Protection and Current Control
Overload current threshold
I
CUT
Class 0/3/4
Class 1
15,400/
V
OUT
5000/
V
OUT
7000/
V
OUT
400
50
5
340
88
400
98
mA
mA
Class 2
154
180
mA
mA
ms
W
Overload current limit
I
LIM
All class levels;
Output = 100
across V
OUT
Output = 100
across V
OUT
Disconnect current
425
60
450
75
—
Overload time
T
LIM
I
MIN
Output power at overload
Efficiency
P
LIM
15.4
17
Disconnect current
System efficiency
7.5
75
10
—
mA
%
(P
IN
@ V
IN
) to (P
OUT
@ V
OUT
)
—
Rev. 1.2
5
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