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EL4581CS-T13

产品描述视频 隔板 IC - NTSC,PAL,SECAM 8-SOIC 封装
产品类别半导体    视频 IC   
文件大小552KB,共10页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 全文预览

EL4581CS-T13概述

视频 隔板 IC - NTSC,PAL,SECAM 8-SOIC 封装

EL4581CS-T13规格参数

参数名称属性值
类别
厂商名称Renesas(瑞萨电子)
包装卷带(TR)
功能隔板
应用专业视频
标准NTSC,PAL,SECAM
电压 - 供电5V
安装类型表面贴装型
封装/外壳8-SOIC(0.154",3.90mm 宽)
供应商器件封装8-SOIC
基本产品编号EL4581

EL4581CS-T13文档预览

DATASHEET
EL4581
Sync Separator, 50% Slice, S-H, Filter
The EL4581 extracts timing information from standard
negative going video sync found in NTSC, PAL and SECAM
broadcast systems. It can also be used in non standard
formats and with computer graphics systems at higher scan
rates, by adjusting a single external resistor. When the input
does not have correct serration pulses in the vertical interval,
a default vertical output is produced.
Outputs are composite sync, vertical sync, burst/back porch
output, and odd/even output. The later operates only in
interlaced scan formats.
The EL4581 provides a reliable method of determining
correct sync slide level by setting it to the mid-point between
sync tip and blanking level at the back porch. This 50% level
is determined by two internal self timing sample and hold
circuits that track sync tip and back porch levels. This also
provides a degree of hum and noise rejection to the input
signal, and compensates for varying input levels of 0.5V
P-P
to 2.0V
P-P
.
A built in linear phase, third order, low pass filter attenuates
the chroma signal in color systems to prevent incorrectly set
color burst from disturbing the 50% sync slide.
This device may be used to replace the industry standard
LM1881, offering improved performance and reduced power
consumption.
The EL4581 video sync separator is manufactured using
Elantec’s high performance analog CMOS process.
FN7172
Rev 2.00
November 12, 2010
Features
• NTSC, PAL and SECAM sync separation
• Single supply, +5V
• Precision 50% slicing, internal caps
• Built-in color burst filter
• Decodes non-standard verticals
• Pin compatible with LM1881
• Low power
• Typically 1.5mA supply current
• Resistor programmable scan rate
• Few external components
• Available in 8 Ld PDIP and SOIC packages
• Pb-free available (RoHS compliant)
Applications
• Video special effects
• Video test equipment
• Video distribution
• Displays
• Imaging
• Video data capture
• Video triggers
Pinout
EL4581
(8 LD SOIC, PDIP)
TOP VIEW
COMPOSITE
SYNC OUT
COMPOSITE
VIDEO IN
VERTICAL
SYNC OUT
GND
1
2
3
4
8
7
6
5
VDD 5V
ODD/EVEN OUTPUT
RSET
BURST/BACK
PORCH OUTPUT
Ordering Information
PART
NUMBER
EL4581CN
EL4581CS*
PART
MARKING
EL4581CN
4581CS
TEMP. RANGE
PACKAGE
PKG.
DWG. #
MDP0031
MDP0027
MDP0027
-40°C to +85°C 8 Ld PDIP
-40°C to +85°C 8 Ld SOIC
-40°C to +85°C 8 Ld SOIC
(Pb-free)
EL4581CSZ* 4581CSZ
(Note)
*Add “-T7” or “-T13” suffix for tape and reel. Please refer to TB347 for
details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Demo Board
A dedicated demo board is not available. However, this
device can be placed on the EL4584/5 Demo Board.
FN7172 Rev 2.00
November 12, 2010
Page 1 of 10
EL4581
Absolute Maximum Ratings
(T
A
= +25°C)
V
CC
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
CC
+0.5V
Thermal Information
Maximum Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications
PARAMETER
I
DD
Clamp Voltage
Discharge Current
Clamp Charge Current
Ref Voltage
V
OL
Output Low Voltage
V
OH
Output High Voltage
Unless otherwise stated, V
DD
= 5V, T
A
= +25°C, R
SET
= 680k.
DESCRIPTION
TEMP (°C)
+25
+25
+25
+25
+25
+25
+25
+25
4
2.4
MIN
(Note 7)
0.75
1.3
6
2
1.5
TYP
1.7
1.5
10
3
1.8
2.1
800
MAX
(Note 7)
3
1.9
20
UNIT
mA
V
µA
mA
V
mV
V
V
V
DD
= 5V (Note 1)
Pin 2, Unloaded
Pin 2 = 2V
Pin 2, V
IN
= 1V
Pin 6, V
DD
= 5V (Note 2)
I
OL
= 1.6mA
I
OH
= -40µA
I
OH
= -1.6mA
NOTES:
1. No video signal, outputs unloaded.
2. Tested for V
DD
5V ±5%.
Dynamic Specifications
PARAMETER
Vertical Sync Width, t
VS
Burst/Back Porch Width, t
B
Vertical Sync Default Delay t
VSD
Filter Attenuation
Composite Sync Prop Delay
Input Dynamic Range
Slice Level
V
DD
= 5V, IV
P-P
video, T
A
= +25°C, C
L
= 15pF, I
OH
= -1.6mA, I
OL
= 1.6mA. Signal voltages are peak to peak.
DESCRIPTION
(Note 3)
(Note 3)
TEMP (°C)
+25
+25
+25
F
IN
= 3.4MHz (Note 4)
V
IN
- Composite Sync (Note 3)
Peak-to-Peak NTSC Signal (Note 5)
Input Voltage = 1V
P-P
(Note 6)
+25
+25
+25
+25
Full
0.5
40
40
50
50
MIN
(Note 7)
190
2.5
40
TYP
230
3.5
55
24
260
400
2
60
60
MAX
(Note 7)
300
4.5
70
UNIT
µs
µs
µs
dB
ns
V
%
%
NOTES:
3. C/S, Vertical and Burst outputs are all active low (V
OH
= 2.4V, V
OL
= 0.8V).
4. Attenuation is a function of R
SET
(PIN 6).
5. Typical min is 0.3V
P-P
.
6. Refers to threshold level of sync tip to back porch amplitude.
7. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
FN7172 Rev 2.00
November 12, 2010
Page 2 of 10
EL4581
Pin Descriptions
PIN NUMBER
1
2
3
4
5
6
7
8
NOTE:
8. R
SET
must be a 1% resistor.
PIN NAME
Composite Sync Out
Composite Video in
Vertical Sync Out
GND
Burst/Back Porch Output
RSET (Note 8)
Odd/Even Output
VDD 5V
FUNCTION
Composite sync pulse output. Sync pulses start on a falling edge and end on a rising edge.
AC coupled composite video input. Sync tip must be at the lowest potential (Positive picture phase).
Vertical sync pulse output. The falling edge of Vert Sync is the start of the vertical period.
Supply ground.
Burst/Back porch output. Low during burst portion of composite video.
An external resistor to ground sets all internal timing. 681k, 1% resistor will provide correct timing
for NTSC signals.
Odd/Even field output. Low during odd fields, high during even fields. Transitions occur at start of
Vert Sync pulse.
Positive supply. (5V)
Typical Performance Curves
1000
900
800
700
600
500
400
300
200
100
10
1000
800
R
SET
(k)
600
400
200
15
20
25
30
35
40
FREQUENCY (kHz)
45
50
0
0
2
4
6
CLAMP TIME (µs)
8
10
R
SET
(k)
FIGURE 1. R
SET
vs HORIZONTAL FREQUENCY
FIGURE 2. BACK PORCH CLAMP, ON-TIME vs R
SET
1000
800
R
SET
(k)
R
SET
(k)
600
400
200
0
0
100
200
300
400
500
1000
800
600
400
200
0
0
20
40
60
80
100
VERTICAL PULSE WIDTH (µs)
DELAY TIME (µs)
FIGURE 3. VERTICAL PULSE WIDTH vs R
SET
FIGURE 4. VERTICAL DEFAULT DELAY, TIME vs R
SET
300
250
200
150
-55
SUPPLY CURRENT (mA)
350
PULSE WIDTH (µs)
2.0
1.5
1.0
0.5
-55
-25
5
35
65
95
125
TEMPERATURE (°C)
-25
5
35
65
95
125
TEMPERATURE (°C)
FIGURE 5. VERTICAL PULSE WIDTH vs TEMPERATURE
FIGURE 6. SUPPLY CURRENT vs TEMPERATURE
FN7172 Rev 2.00
November 12, 2010
Page 3 of 10
EL4581
Typical Performance Curves
PACKAGE POWER DISSIPATION VS
AMBIENT TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE
2.0 THERMAL CONDUCTIVITY TEST BOARD
1.8
POWER DISSIPATION (W)
1.6 1.471W
1.4
1.2
1.0 1.136W
0.8
0.6
0.4
0.2
0
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
150
SO8
JA
= 110°C/W
PDIP8
JA
= 85°C/W
PACKAGE POWER DISSIPATION VS
AMBIENT TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1.8
POWER DISSIPATION (W)
1.6
1.4 1.25W
1.2
1.0
0.8
0.6
0.4
0.2
0
0
781mW
PDIP8
JA
= 100°C/W
SO8
JA
= 160°C/W
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
150
FIGURE 7. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 8. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
0
-5
OUTPUT (dB)
-10
-15
-20
-25
-30
-35
100k
1M
2M
4M
10M
FREQUENCY (Hz)
FIGURE 9. INPUT SIGNAL = 300mV
P-P
, EL4581 FILTER CHARACTERISITIC CONSTANT DELAY 240ns
FN7172 Rev 2.00
November 12, 2010
Page 4 of 10
EL4581
Timing Diagrams
SIGNAL 1a. COMPOSITE VIDEO INPUT, FIELD ONE
1.5µs±230µs
FIELD ONE
TIME
+H
VERTICAL BLANKING INTERVAL = 20H -0
(
1271µs +63.5µs
)
-0µs
T1
3H
3H
3H
1
H SYNC
INTERVAL
H
2
3
4
5
6
7
8
9
10
19
20
21
START OF
H
FIELD ONE
PRE-EQUALIZING
PULSE INTERVAL
H
VERTICAL SYNC
PULSE INTERVAL
9 LINE VERTICAL
INTERVAL
0.5H
POST-EQUALIZING
PULSE INTERVAL
H
REF SUBCARRIER PHASE,
COLOR FIELD ONE
(*SEE NOTE)
SIGNAL 1b. COMPOSITE SYNC OUTPUT, PIN 1
SIGNAL 1c. VERTICAL SYNC OUTPUT, PIN 3
SIGNAL 1d. ODD-EVEN OUTPUT, PIN 7
SIGNAL 1e. BACK PORCH OUTPUT, PIN 5
SEE FIG 2, 3
SEE FIG 4
NOTES:
9. The composite sync output reproduces all the video input sync pulses, with a propagation delay.
10. Vertical sync leading edge is coincident with the first vertical serration pulse leading edge, with a propagation delay.
11. Odd-even output is low for even field, and high for odd field.
12. Back porch goes low for a fixed pulse width on the trailing edge of video input sync pulses. Note that for serration pulses during vertical, the
back porch starts on the rising edge of the serration pulse (with propagation delay).
FIGURE 10.
FN7172 Rev 2.00
November 12, 2010
Page 5 of 10

 
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