DATASHEET
ISL6614
Dual Advanced Synchronous Rectified Buck MOSFET Drivers with Protection
Features
The ISL6614 integrates two ISL6613 MOSFET drivers and is
specifically designed to drive two independent power
channels in a Multi-Phase interleaved buck converter
topology. These drivers combined with HIP63xx or ISL65xx
Multi-Phase Buck PWM controllers and N-Channel
MOSFETs form complete core-voltage regulator solutions for
advanced microprocessors.
The ISL6614 drives both the upper and lower gates
simultaneously over a range from 5V to 12V. This drive
voltage provides the flexibility necessary to optimize
applications involving trade-offs between gate charge and
conduction losses.
An advanced adaptive zero shoot-through protection is
integrated to prevent both the upper and lower MOSFETs
from conducting simultaneously and to minimize the dead
time. These products add an overvoltage protection feature
operational before VCC exceeds its turn-on threshold, at
which the PHASE node is connected to the gate of the low
side MOSFET (LGATE). The output voltage of the converter
is then limited by the threshold of the low side MOSFET,
which provides some protection to the microprocessor if the
upper MOSFET(s) is shorted during startup. The over-
temperature protection feature prevents failures resulting
from excessive power dissipation by shutting off the outputs
when its junction temperature exceeds +150°C (typically).
The driver resets once its junction temperature returns to
+108°C (typically).
The ISL6614 also features a three-state PWM input which,
working together with Intersil’s multi-phase PWM controllers,
prevents a negative transient on the output voltage when the
output is shut down. This feature eliminates the Schottky
diode that is used in some systems for protecting the load
from reversed output voltage events.
FN9155
Rev.5.00
May 5, 2008
Features
• Pin-to-pin Compatible with HIP6602 SOIC Family for
Better Performance and Extra Protection Features
• Quad N-Channel MOSFET Drives for Two Synchronous
Rectified Bridges
• Advanced Adaptive Zero Shoot-Through Protection
- Body Diode Detection
- Auto-zero of r
DS(ON)
Conduction Offset Effect
• Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency
• Internal Bootstrap Schottky Diode
• Bootstrap Capacitor Overcharging Prevention
• Supports High Switching Frequency (up to 1MHz)
- 3A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Three-State PWM Input for Output Stage Shutdown
• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement
• Pre-POR Overvoltage +Protection
• VCC Undervoltage Protection
• Over-Temperature Protection (OTP) with +42°C Hysteresis
• Expandable Bottom Copper Pad for Enhanced Heat Sinking
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package Footprint, which Improves
PCB Efficiency and has a Thinner Profile
• Pb-free Available (RoHS compliant)
Applications
• Core Regulators for Intel® and AMD® Microprocessors
• High Current DC/DC Converters
• High Frequency and High Efficiency VRM and VRD
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief 400 and 417 for Power Train Design,
Layout Guidelines, and Feedback Compensation Design
FN9155 Rev.5.00
May 5, 2008
Page 1 of 12
ISL6614
ISL6614CB, ISL6614CBZ, ISL6614IB
(14 LD SOIC)
TOP VIEW
PWM1
PWM2
GND
LGATE1
PVCC
PGND
LGATE2
1
2
3
4
5
6
7
14 VCC
13 PHASE1
12 UGATE1
11 BOOT1
10 BOOT2
9 UGATE2
8 PHASE2
GND 1
LGATE1 2
GND
PVCC 3
PGND 4
5
NC
6
LGATE2
7
PHASE2
8
NC
10 BOOT2
9
UGATE2
ISL6614CR, ISL6614CRZ, ISL6614IR, ISL6614IRZ
(16 LD QFN)
TOP VIEW
PHASE1
13
12 UGATE1
11 BOOT1
PWM2
PWM1
15
16
Ordering Information
PART NUMBER
ISL6614CB*
ISL6614CBZ* (Note)
ISL6614CBZA* (Note)
ISL6614CR*
ISL6614CRZ* (Note)
ISL6614CRZA* (Note)
ISL6614IB*
ISL6614IBZ* (Note)
ISL6614IR*
ISL6614IRZ* (Note)
PART MARKING
ISL6614CB
6614CBZ
6614CBZ
ISL 6614CR
66 14CRZ
66 14CRZ
ISL6614IB
6614IBZ
ISL 6614IR
66 14IRZ
TEMP. RANGE (°C)
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
PACKAGE
14 Ld SOIC
14 Ld SOIC (Pb-free)
14 Ld SOIC (Pb-free)
16 Ld 4x4 QFN
16 Ld 4x4 QFN (Pb-free)
16 Ld 4x4 QFN (Pb-free)
14 Ld SOIC
14 Ld SOIC (Pb-free)
16 Ld 4x4 QFN
16 Ld 4x4 QFN (Pb-free)
PKG. DWG. #
M14.15
M14.15
M14.15
L16.4x4
L16.4x4
L16.4x4
M14.15
M14.15
L16.4x4
L16.4x4
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
FN9155 Rev.5.00
May 5, 2008
VCC
14
Page 2 of 12
ISL6614
Block Diagram
BOOT1
UGATE1
PVCC
VCC
+5V
OTP AND
PRE-POR OVP
FEATURES
SHOOT-
THROUGH
PROTECTION
PHASE1
CHANNEL 1
10k
PWM1
8k
PVCC
LGATE1
PGND
+5V
CONTROL
LOGIC
PGND
BOOT2
UGATE2
PVCC
10k
PWM2
8k
GND
SHOOT-
THROUGH
PROTECTION
PHASE2
CHANNEL 2
PVCC
LGATE2
PGND
PAD
FOR ISL6614CR, THE PAD ON THE BOTTOM SIDE OF
THE QFN PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND.
FN9155 Rev.5.00
May 5, 2008
Page 3 of 12
ISL6614
Typical Application - 4 Channel Converter Using ISL65xx and ISL6614 Gate Drivers
+12V
BOOT1
+12V
UGATE1
VCC
PHASE1
LGATE1
+5V
DUAL
DRIVER
ISL6614
FB
VSEN
COMP
V
CC
ISEN1
PGOOD
EN
PWM1
PWM2
MAIN ISEN2
CONTROL
ISL65xx
PWM1
PWM2
LGATE2
PHASE2
PVCC
5V TO 12V
BOOT2
+12V
UGATE2
VID
GND
PGND
+V
CORE
ISEN3
FS/DIS
PWM3
PWM4
GND
ISEN4
UGATE1
VCC
PHASE1
+12V
BOOT1
+12V
LGATE1
DUAL
DRIVER
ISL6614
PVCC
5V TO 12V
BOOT2
+12V
UGATE2
PWM1
PWM2
LGATE2
PHASE2
GND
PGND
FN9155 Rev.5.00
May 5, 2008
Page 4 of 12
ISL6614
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V
BOOT Voltage (V
BOOT-GND
). . . . . . . . . . . . . . . . . . . . . . . . . . . .36V
Input Voltage (V
PWM
) . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V
UGATE. . . . . . . . . . . . . . . . . . . V
PHASE
- 0.3V
DC
to V
BOOT
+ 0.3V
V
PHASE
- 3.5V (<100ns Pulse Width, 2µJ) to V
BOOT
+ 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V
DC
to V
PVCC
+ 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to V
PVCC
+ 0.3V
PHASE. . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V
DC
to 15V
DC
GND - 8V (<400ns, 20µJ) to 30V (<200ns, V
BOOT-GND
<36V)
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD
Thermal Information
Thermal Resistance (Typical) . . . . . . . . . .
JA
(°C/W)
JC
(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . .
90
N/A
QFN Package (Notes 2, 3). . . . . . . . . .
44
4.5
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . .-40°C to +85°C
Maximum Operating Junction Temperature. . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V
10%
Supply Voltage Range, PVCC . . . . . . . . . . . . . . . . 5V to 12V
10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air.
2.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Bias Supply Current
Gate Drive Bias Current
Recommended Operating Conditions, Unless Otherwise Noted.
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
VCC
I
PVCC
f
PWM
= 300kHz, V
PVCC
= 12V
f
PWM
= 300kHz, V
PVCC
= 12V
-
-
7.1
9.7
-
-
mA
mA
POWER-ON RESET AND ENABLE
VCC Rising Threshold
0°C to +85°C
-40°C to +85°C
VCC Falling Threshold
0°C to +85°C
-40°C to +85°C
PWM INPUT (See “TIMING DIAGRAM” on page 8)
Input Current
I
PWM
V
PWM
= 5V
V
PWM
= 0V
PWM Rising Threshold
PWM Falling Threshold
Typical Three-State Shutdown Window
Three-State Lower Gate Falling Threshold
Three-State Lower Gate Rising Threshold
Three-State Upper Gate Rising Threshold
Three-State Upper Gate Falling Threshold
Shutdown Hold-off Time
UGATE Rise Time
LGATE Rise Time
UGATE Fall Time
LGATE Fall Time
UGATE Turn-On Propagation Delay (Note 4)
t
TSSHD
t
RU
t
RL
t
FU
t
FL
t
PDHU
V
PVCC
= 12V, 3nF Load, 10% to 90%
V
PVCC
= 12V, 3nF Load, 10% to 90%
V
PVCC
= 12V, 3nF Load, 90% to 10%
V
PVCC
= 12V, 3nF Load, 90% to 10%
V
PVCC
= 12V, 3nF Load, Adaptive
V
CC
= 12V
V
CC
= 12V
V
CC
= 12V
V
CC
= 12V
V
CC
= 12V
V
CC
= 12V
V
CC
= 12V
-
-
-
-
1.80
-
-
-
-
-
-
-
-
-
-
450
-400
3.00
2.00
-
1.50
1.00
3.20
2.60
245
26
18
18
12
10
-
-
-
-
2.40
-
-
-
-
-
-
-
-
-
-
µA
µA
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
9.35
8.35
7.35
6.35
9.80
-
7.60
-
10.05
10.05
8.00
8.00
V
V
V
V
FN9155 Rev.5.00
May 5, 2008
Page 5 of 12
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