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DM74LS123N

产品描述单稳态多谐振荡器 45 ns 16-PDIP
产品类别逻辑    多频振荡器   
文件大小95KB,共8页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
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DM74LS123N概述

单稳态多谐振荡器 45 ns 16-PDIP

DM74LS123N规格参数

参数名称属性值
类别
厂商名称ON Semiconductor(安森美)
系列74LS
包装管件
逻辑类型单稳态
施密特触发器输入
电流 - 输出高、低400µA,8mA
工作温度0°C ~ 70°C
安装类型通孔
封装/外壳16-DIP(0.300",7.62mm)
供应商器件封装16-PDIP
独立电路2
传播延迟45 ns
电压 - 供电4.75 V ~ 5.25 V
基本产品编号74LS123

文档预览

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DM74LS123 Dual Retriggerable One-Shot with Clear and Complementary Outputs
August 1986
Revised April 2000
DM74LS123
Dual Retriggerable One-Shot
with Clear and Complementary Outputs
General Description
The DM74LS123 is a dual retriggerable monostable multi-
vibrator capable of generating output pulses from a few
nano-seconds to extremely long duration up to 100% duty
cycle. Each device has three inputs permitting the choice of
either leading edge or trailing edge triggering. Pin (A) is an
active-LOW transition trigger input and pin (B) is an active-
HIGH transition trigger input. The clear (CLR) input termi-
nates the output pulse at a predetermined time indepen-
dent of the timing components. The clear input also serves
as a trigger input when it is pulsed with a low level pulse
transition ( ). To obtain the best trouble free operation
from this device please read the operating rules as well as
the Fairchild Semiconductor one-shot application notes
carefully and observe recommendations.
Features
s
DC triggered from active-HIGH transition or active-LOW
transition inputs
s
Retriggerable to 100% duty cycle
s
Compensated for V
CC
and temperature variations
s
Triggerable from CLEAR input
s
DTL, TTL compatible
s
Input clamp diodes
Ordering Code:
Order Number
DM74LS123M
DM74LS123SJ
DM74LS123N
Package Number
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
CLEAR
L
X
X
H
H
A
X
H
X
L
L
B
X
X
L
H
H
Q
L
L
Outputs
Q
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
X
=
Can Be Either LOW or HIGH
↑ =
Positive Going Transition
↓ =
Negative Going Transition
=
A Positive Pulse
=
A Negative Pulse

L
H

© 2000 Fairchild Semiconductor Corporation
DS006386
www.fairchildsemi.com

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