FAN7930C — Critical Conduction Mode PFC Controller
FAN7930C
Critical Conduction Mode PFC Controller
Features
PFC-Ready Signal
V
IN
-Absent Detection
Maximum Sw itching Frequency Limitation
Internal Soft-Start and Startup w ithout Overshoot
Internal Total Harmonic Distortion (THD) Optimizer
Precise Adjustable Output Over-Voltage Protection
Open-Feedback Protection and Disable Function
Zero-Current Detector (ZCD)
150 μs Internal Startup Timer
MOSFET Over-Current Protection (OCP)
Under-Voltage Lockout w ith 3.5 V Hysteresis
Low Startup and Operating Current
Totem-Pole Output w ith High State Clamp
+500/-800
mA Peak Gate Drive Current
8-Pin, Small Outline Package (SOP)
Description
The FA N7930C is an active pow er factor correction
(PFC) controller for boost PFC applications that operate
in critical conduction mode ( CRM). It uses a voltage-
mode PWM that compares an internal ramp signal w ith
the error amplifier output to generate a MOSFET turn-off
signal. Because the voltage- mode CRM PFC controller
does not need rectified A C line voltage infor mation, it
saves the pow er loss of an input voltage-sensing netw ork
necessary for a current-mode CRM PFC controller.
FA N7930C provides over-voltage protection (OV P),
open-feedback protection, over-current protection
(OCP), input-voltage-absent detection, and under-
voltage lockout protection ( UVLO). The PFC-ready pin
can be used to trigger other pow er stages w hen PFC
output voltage reaches the proper level w ith hysteresis.
The FAN7930C can be disabled if the INV pin voltage is
low er than 0.45 V and the operating current decreases
to a very low level. Us ing a new variable on-time control
method, total har monic distortion (THD) is low er than in
conventional CRM boost PFC ICs.
Related Resources
AN-8035 — Design Consideration for Boundary
Conduction Mode PFC Using FAN7930
Applications
Adapter
Ballast
LCD TV, CRT TV
SMPS
Ordering Information
Part Number
FAN7930CMX-G
Operating
Top Mark
Temperature Range
-40 to +125°C
7930C
Package
8-Lead, Small Outline Package (SOP)
Packing
Method
Tape & Reel
© 2010 Semiconductor Components Industries, LLC.
December-2017,
Rev.
3
Publication Order Number:
FAN7930C/D
FAN7930C — Critical Conduction Mode PFC Controller
Application Diagram
DC OUTPUT
Vcc
line filter
AC INPUT
PFC
ready
FAN7930C
8
5
3
2
V
CC
ZCD
CS
COMP
RDY
GND
INV
Out
7
4
1
6
Figure 1.
Typical Boost PFC Application
Internal Block Diagram
V
CC
H:open
V
REF
V
CC
V
BIAS
2.5V
REF
Internal
Bias
8
V
CC
-
reset
V
Z
+
V
TH(S/S)
8.5
12
Clamp
Circuit
ZCD
5
-
+
V
TH(ZCD)
Restart
Timer
f
MAX
limit
V
CC
Gate
Driver
V
O(MAX)
7
OUT
THD
Optimized
Sawtooth
Generator
S
Control Range
Compensation
Q
+
-
Startup without
Overshoot
R
Q
40k
W
+
8pF
4
CS
-
INV
1
V
REF
V
REF
Stair
Step
-
+
Clamp
Circuit
reset
V
IN
Absent
V
CS_LIM
6
GND
COMP
3
disable
disable
-
+
Thermal
Shutdown
2.5
2.675
0.35
0.45
RDY
2
INV_open
OVP
UVLO
V
BIAS
2.051
2.240
Figure 2.
Functional Block Diagram
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FAN7930C — Critical Conduction Mode PFC Controller
Pin Configuration
V
CC
OUT
GND
ZCD
FAN7930C
8-SOP
INV
Figure 3.
RDY COMP
CS
Pin Configuration (Top View )
Pin Definitions
Pin #
1
Name Description
INV
This pin is the inverting input of the error amplifier. The output voltage of the boost PFC converter
should be resistively divided to 2.5 V.
This pin is used to detect PFC output voltage reaching a pre-determined value. When output
voltage reaches 89% of rated output voltage, this pin is pulled HIGH, w hich is an (open-drain)
output type.
This pin is the output of the transconductance error amplifier. Components for the output voltage
compensation should be connected betw een this pin and GND.
This pin is the input of the over-current protection comparator. The MOSFET current is sensed
using a sensing resistor and the resulting voltage is applied to this pin. An internal RC filter is
included to filter sw itching noise.
This pin is the input of the zero-current detection (ZCD) block. If the voltage of this pin goes
higher than 1.5 V, then goes low er than 1.4 V, the MOSFET is turned on.
This pin is used for the ground potential of all the pins. For proper operation, the signal ground
and the pow er ground should be separated.
This pin is the gate drive output. The peak sourcing and sinking current levels are +500 mA and
-800 mA, respectively. For proper operation, the stray inductance in the gate driving path must be
minimized.
This is the IC supply pin. IC current and MOSFET drive current are supplied using this pin.
2
RDY
3
COMP
4
CS
5
6
ZCD
GND
7
8
OUT
V
CC
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FAN7930C — Critical Conduction Mode PFC Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
OH
, I
OL
I
CLAMP
I
DET
V
IN
T
J
T
A
T
STG
ESD
Supply Voltage
Peak Drive Output Current
Parameter
Min.
-800
-10
-10
Max.
V
Z
+500
+10
+10
V
Z
8.0
6.0
+150
Unit
V
mA
mA
mA
V
Driver Output Clamping Diodes V
O
>V
CC
or V
O
<-0.3 V
Detector Clamping Diodes
RDY Pin 1
( )
( )
Error Amplifier Input, Output and ZCD 1
CS Input Voltage 2
( )
-0.3
-10.0
-40
-65
Operating Junction Temperature
Operating Temperature Range
Storage Temperature Range
Electrostatic Discharge
Capability
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
°C
°C
°C
kV
+125
+150
2.5
2.0
Notes:
1. When this pin is supplied by external pow er sources by accident, its maximum allow able current is 50 mA.
2. In case of DC input, the acceptable input range is -0.3 V~6 V: w ithin 100 ns -10 V~6 V is acceptable, but
electrical specifications are not guaranteed during such a short time.
Thermal Impedance
Symbol
JA
Parameter
Thermal Resistance, Junction-to-Ambient 3
( )
Min.
150
Max.
Unit
°C/W
Note:
3. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.
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FAN7930C — Critical Conduction Mode PFC Controller
Electrical Characteristics
V
CC
= 14 V and T
A
= -40°C~+125°C, unless otherw ise specified.
Symbol
V
CC
Section
V
START
V
STOP
HY
UVLO
V
Z
V
OP
I
START
I
OP
I
DOP
I
OPDIS
V
REF1
V
REF1
V
REF2
I
EA,BS
I
EAS,SR
I
EAS,SK
V
EAH
V
EAZ
g
m
Parameter
Start Threshold Voltage
Stop Threshold Voltage
UVLO Hysteresis
Zener Voltage
Recommended Operating Range
Startup Supply Current
Operating Supply Current
Dynamic Operating Supply Current
Operating Current at Disable
Conditions
V
CC
Increasing
V
CC
Decreasing
I
CC
=20 mA
Min.
11
7.5
3.0
20
13
Typ.
12
8.5
3.5
22
Max.
13
9.5
4.0
24
20
Unit
V
V
V
V
V
µA
mA
mA
µA
Supply Current Section
V
CC
=V
START
-0.2 V
Output Not Sw itching
50 kHz, C
I
=1 nF
V
INV
=0 V
90
120
1.5
2.5
160
190
3.0
4.0
230
Error Am plifier Section
Voltage Feedback Input Threshold1 T
A
=25°C
Line Regulation
Temperature Stability of
Input Bias Current
Output Source Current
Output Sink Current
Output Upper Clamp Voltage
Zero-Duty Cycle Output Voltage
Transconductance 4
( )
( )
V
REF1
4
2.465
2.500
0.1
20
2.535
10.0
V
mV
mV
V
CC
=14 V~20 V
V
INV
=1 V~4 V
V
INV
=V
REF
-0.1 V
V
INV
=V
REF
+0.1 V
V
INV
=1 V, V
CS
=0 V
-0.5
-12
12
6.0
0.9
90
6.5
1.0
115
0.5
µA
µA
µA
7.0
1.1
140
V
V
µmho
Maxim um On-Tim e Section
t
ON,MAX1
t
ON,MAX2
Maximum On-Time Programming 1
Maximum On-Time Programming 2
T
A
=25°C, V
ZCD
=1 V
T
A
=25°C,
I
ZCD
=0.469 mA
35.5
11.2
41.5
13.0
47.5
14.8
µs
µs
Current-Sense Section
V
CS
I
CS,BS
t
CS,D
Current-Sense Input Threshold
Voltage Limit
Input Bias Current
Current-Sense Delay to Output
(4)
0.7
V
CS
=0 V~1 V
dV/dt=1 V/100 ns,
from 0 V to 5 V
-1.0
0.8
-0.1
350
0.9
1.0
500
V
µA
ns
Continued on the following page…
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