Datasheet> 器件分类 > 半导体> 存储器> MT48H8M16LFB4-6:K TR

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MT48H8M16LFB4-6:K TR: 产品描述SDRAM - 移动 LPSDR 存储器 IC 128Mb（8M x 16）并联 166 MHz 5 ns 54-VFBGA（8x8）; 产品类别半导体存储器; 文件大小2MB，共86页; 制造商Micron Technology; 官网地址http://www.mdtic.com.tw/; 标准

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MT48H8M16LFB4-6:K TR概述

SDRAM - 移动 LPSDR 存储器 IC 128Mb（8M x 16）并联 166 MHz 5 ns 54-VFBGA（8x8）

MT48H8M16LFB4-6:K TR规格参数

参数名称	属性值
类别
厂商名称	Micron Technology
包装	卷带（TR）
存储器类型	易失
存储器格式	DRAM
技术	SDRAM - 移动 LPSDR
存储容量	128Mb（8M x 16）
存储器接口	并联
写周期时间 - 字，页	15ns
电压 - 供电	1.7V ~ 1.95V
工作温度	0°C ~ 70°C（TA）
安装类型	表面贴装型
封装/外壳	54-VFBGA
供应商器件封装	54-VFBGA（8x8）
时钟频率	166 MHz
访问时间	5 ns
基本产品编号	MT48H8M16

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128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM

Features

Mobile Low-Power SDR SDRAM

MT48H8M16LF – 2 Meg x 16 x 4 banks

MT48H4M32LF – 1 Meg x 32 x 4 banks

Features

• V

DDQ

= 1.7–1.95V

• Fully synchronous; all signals registered on positive

edge of system clock

• Internal, pipelined operation; column address can

be changed every clock cycle

• 4 internal banks for concurrent operation

• Programmable burst lengths (BL): 1, 2, 4, 8, and con-

tinuous

• Auto precharge, includes concurrent auto precharge

• Auto refresh and self refresh modes

• LVTTL-compatible inputs and outputs

• On-chip temperature sensor to control self refresh

rate

• Partial-array self refresh (PASR)

• Deep power-down (DPD)

• Selectable output drive strength (DS)

• 64ms refresh period

Options

• V

DDQ

: 1.8V/1.8V

• Addressing

– Standard addressing option

• Configuration

– 8 Meg x 16 (2 Meg x 16 x 4 banks)

– 4 Meg x 32 (1 Meg x 32 x 4 banks)

• Plastic “green” packages

– 54-ball VFBGA (8mm x 8mm)

– 90-ball VFBGA (8mm x 13mm)

• Timing: cycle time

– 6ns at CL = 3

– 7.5ns at CL = 3

• Operating temperature range

– Commercial (0˚C to +70˚C)

– Industrial (–40˚C to +85˚C)

• Revision

Notes:

Marking

8M16

4M32

-6

-75

None

1. Available only for x16 configuration.

2. Available only for x32 configuration.

Table 1: Configuration Addressing

Architecture

Number of banks

Bank address balls

Row address balls

Column address balls

8 Meg x 16

BA0, BA1

A[11:0]

A[8:0]

4 Meg x 32

BA0, BA1

A[11:0]

A[7:0]

Table 2: Key Timing Parameters

Speed

Grade

-6

-75

Note:

Clock Rate (MHz)

CL = 2

104

CL = 3

166

133

Access Time

CL = 2

8ns

CL = 3

5ns

5.4ns

1. CL = CAS (READ) latency

PDF: 09005aef832ff1ea

128mb_mobile_sdram_y35M.pdf - Rev. G 10/09 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM

Features

Contents

General Description ......................................................................................................................................... 8

Functional Block Diagram ................................................................................................................................ 9

Ball Assignments and Descriptions ................................................................................................................. 10

Package Dimensions ....................................................................................................................................... 13

Electrical Specifications .................................................................................................................................. 15

Absolute Maximum Ratings ........................................................................................................................ 15

Electrical Specifications – I

Parameters ........................................................................................................ 17

Electrical Specifications – AC Operating Conditions ......................................................................................... 20

Output Drive Characteristics ........................................................................................................................... 23

Functional Description ................................................................................................................................... 26

Commands .................................................................................................................................................... 27

COMMAND INHIBIT .................................................................................................................................. 28

NO OPERATION (NOP) ............................................................................................................................... 28

LOAD MODE REGISTER (LMR) ................................................................................................................... 28

ACTIVE ...................................................................................................................................................... 28

READ ......................................................................................................................................................... 29

WRITE ....................................................................................................................................................... 30

PRECHARGE .............................................................................................................................................. 31

BURST TERMINATE ................................................................................................................................... 31

AUTO REFRESH ......................................................................................................................................... 31

SELF REFRESH ........................................................................................................................................... 32

DEEP POWER-DOWN ................................................................................................................................. 32

Truth Tables ................................................................................................................................................... 33

Initialization .................................................................................................................................................. 38

Mode Register ................................................................................................................................................ 40

Burst Length .............................................................................................................................................. 41

Burst Type .................................................................................................................................................. 41

CAS Latency ............................................................................................................................................... 43

Operating Mode ......................................................................................................................................... 43

Write Burst Mode ....................................................................................................................................... 43

Extended Mode Register ................................................................................................................................. 44

Temperature-Compensated Self Refresh ...................................................................................................... 44

Partial-Array Self Refresh ............................................................................................................................ 45

Output Drive Strength ................................................................................................................................ 45

Bank/Row Activation ...................................................................................................................................... 46

READ Operation ............................................................................................................................................. 47

WRITE Operation ........................................................................................................................................... 56

Burst Read/Single Write .............................................................................................................................. 63

PRECHARGE Operation .................................................................................................................................. 64

Auto Precharge ........................................................................................................................................... 64

AUTO REFRESH Operation ............................................................................................................................. 76

SELF REFRESH Operation ............................................................................................................................... 78

Power-Down .................................................................................................................................................. 80

Deep Power-Down ......................................................................................................................................... 81

Clock Suspend ............................................................................................................................................... 82

Revision History ............................................................................................................................................. 85

Rev. G, Production – 10/09 .......................................................................................................................... 85

Rev. F, Production – 8/09 ............................................................................................................................. 85

Rev. E, Production – 4/09 ............................................................................................................................ 85

Rev. D, Production – 10/08 .......................................................................................................................... 85

PDF: 09005aef832ff1ea

128mb_mobile_sdram_y35M.pdf - Rev. G 10/09 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM

Features

List of Tables

Table 1: Configuration Addressing ................................................................................................................... 1

Table 2: Key Timing Parameters ....................................................................................................................... 1

Table 3: VFBGA Ball Descriptions ................................................................................................................... 12

Table 4: Absolute Maximum Ratings .............................................................................................................. 15

Table 5: DC Electrical Characteristics and Operating Conditions ..................................................................... 15

Table 6: Capacitance ..................................................................................................................................... 16

Table 7: I

Specifications and Conditions (x16) ............................................................................................. 17

Table 8: I

Specifications and Conditions (x32) ............................................................................................. 17

Table 9: I

DD7

Specifications and Conditions (x16 and x32) ............................................................................... 18

Table 10: Electrical Characteristics and Recommended AC Operating Conditions ............................................ 20

Table 11: AC Functional Characteristics ......................................................................................................... 21

Table 12: Target Output Drive Characteristics (Full Strength) ........................................................................... 23

Table 13: Target Output Drive Characteristics (Three-Quarter Strength) .......................................................... 24

Table 14: Target Output Drive Characteristics (One-Half Strength) .................................................................. 25

Table 15: Truth Table – Commands and DQM Operation ................................................................................. 27

Table 16: Truth Table – Current State Bank

Command to Bank

.................................................................. 33

Table 17: Truth Table – Current State Bank n, Command to Bank

................................................................. 35

Table 18: Truth Table – CKE ........................................................................................................................... 37

Table 19: Burst Definition Table ..................................................................................................................... 42

PDF: 09005aef832ff1ea

128mb_mobile_sdram_y35M.pdf - Rev. G 10/09 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT48H8M16LFB4-6:K TR

MT48H8M16LFB4-6:K TR概述

MT48H8M16LFB4-6:K TR规格参数

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