Features
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Servo Processing Unit (SPU), Using Dedicated 16-bit Instruction Cycle AVR
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RISC
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Cores (3), Giving 120 MIPS Maximum Processing Power with 40 MHz SYSCLK
SPU Includes 17 x 17 Single-clock Cycle MAC
On-chip Debugger Monitor for Program Development (OCDM)
8K Words Program RAM
4K Bytes Data RAM
On-chip Clock Frequency Synthesizer with Output Clock Buffers for AT78C1501
Controller
On-chip S/H and WCS Timing State Machine (TSM) for Conversion of Focus, Tracking
and SUM Signals
10-bit 1.2 µsec ADC with six-channel MUX
Synchronized ADC Conversions with SPU Interrupt Service Routine
Three Fast 10-bit 500 nsec (rise time) DACs for Servo Loops and Adjustments
Three 8-bit DACs for Offset Adjustment and Spin Loop
Bandgap ADC and DAC Midpoint Reference Outputs
SPU Implemented Spindle Speed Control
Spindle Interface Logic and Hardware Support for Both CAV and CLV Spindle Control
Modes
Eight General Purpose I/O Pins
SPU Servo Control of Focus, Fine Track, Coarse Track and Tray Load Motors
High-speed Track Counter for Accurate High-speed Track Counts (1.4 MHz when used
with AT78C1503 Read Channel)
Lower Power Operations with 3.3V Core and 5V Tolerant I/Os
8-bit Data and 14-bit Address Controller/Microprocessor Interface
3-pin Universal Serial Port Interface to Program Read Channel and Power Devices
Power Management
On-chip UART to Access OCDM Unit
DVD/CD Servo
AT78C1502
Description
The Atmel AT78C1502 high-performance servo controller fully integrates all of the
control and demodulation functions for DVD and CD, optical/mechanical systems.
Packaged in 128-lead TQFP and fabricated in 0.35 micron CMOS, the device oper-
ates on a 3.3V logic/analog supply and provides 5V tolerance for digital I/O. An AVR-
based Servo Processing Unit (SPU) embedded in the device provides programmable
control of spindle speed, coarse and fine tracking, focus, sled, draw motor and tilt. The
three parallel programmable AVR microcontrollers in the SPU are the heart of the sys-
tem, offering a range of servo sample rates. With only a 40 MHz system clock, 120
MIPS of processing power is provided. Real-time notch filters can also be calculated.
Fast 10-bit DACs provide real-time control of servo loops and other system adjust-
ments. A universal serial port and many general purpose I/Os are provided.
AVR0 is the master AVR of the three microcontrolloers, communicating with AVR1,
AVR2 and the ARMTDMI in the AT78C1501 interface controller and to the AT78C1503
read channel. An On-Chip Debugger Monitor (OCDM) is offered to enable program-
mers to easily observe theeffect of changes to code on each AVR.
System-level evaluation boards are available with development code in both C and
native code for basic operation of all servos. Simple changes to the code allow any
mechadeck to be interfaced to the AT78C1502.
Rev. 2050A–DVD–07/02
1
External Pin
Definition
P = Power or ground, B = Bidirectional, I = Digital Input, O = Digital Output.
AI = Analog Input, AO = Analog Output.
Table 1.
External Pin Definition
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
Symbol
DGND
D0
D1
D2
D3
DVDD
D4
D5
D6
D7
DGND
WRB
RDB
CSB
CINT
CINTACK
TMODE
DVDD
OCDM_ENAB
TM4/MUX4
TM3/MUX3
TM2/MUX2
TM1/MUX1
TM0/MUX0
DGND
MRST
WG
IDF
JTRIG
LHP
DVDD
TOK
BCA
Type
P
B
B
B
B
P
B
B
B
B
P
I
I
I
I
O
I
P
I
I
I
I
I
I
P
I
I
I
I
I
P
I
I
Description
Digital Ground
Data Bus
Data Bus
Data Bus
Data Bus
Digital VDD
Data Bus
Data Bus
Data Bus
Data Bus
Digital Ground
Chip Write Select
Chip Read Select
Chip Select Input
Interrupt Input from Controller
Controller Interrupt Acknowledge
Test Mode Select Input – Active-low
Digital VDD
On-chip Debug/Monitor Mode
Test Mode Select
Test Mode Select Input/MUX Output
Test Mode Select Input/MUX Output
Test Mode Select Input/MUX Output
Test Mode Select Input/MUX Output
Digital Ground
Master Reset Input
Write Gate Input from Controller
I/D Field Input from Controller
Jump Trigger Input from Controller
Laser High Power Input from Controller
Digital Power
Track OK Input from Read Channel
Burst Cutting Area (Defect Flag Input)
4
AT78C1502
2050A–DVD–07/02
AT78C1502
Table 1.
External Pin Definition (Continued)
Pin #
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
Symbol
TZC
MIRR
FOK
HD1,2
DGND
DGND
HD3,4
CNTRST
SINT
SF
ADCSTR
AVDD
MUX_OUT
AIN6
AIN5
MTRK
MTRKFB
AGND
LPS
LPS
FCS
FCSF
AVDD
SUM
SUMF
RDSZ
RDSZF
N/C
N/C
ADCREF
AGND
AGND
N/C
VBG
2VBG
AVDD
AO
AO
P
AI
P
P
Type
I
I
I
I
P
P
I
I
O
O
O
P
AO
AI
AI
AI
AI
P
AI
AI
AI
AI
P
AI
AI
AI
AI
Description
Track Zero Crossing from Read Channel
Mirror Input from Read Channel
Focus OK Signal from Read Channel
Header 1, 2 Input from Read Channel
Digital Ground
Digital Ground
Header 3, 4 Input from Read Channel
TSM Counter Reset Signal
Servo Interrupt Output to Controller
Servo Fault Output to Controller
ADC Strobe Output from TSM
Analog VDD
Analog MUX Output
Analog Input to MUX
Analog Input to MUX
MUXed Track Track/Hold Input
MUXed Track Filter Input
Analog Ground
Lens Position Sensor Track/Hold Input
Lens Position Sensor Filter Input
Focus Error Signal Track/Hold Input
Focus Error Signal Filter Input
Analog VDD
Slow Sum Track/Hold Input
Slow Sum Input Filter
Read Size Input
Read Size Input Filter
No Connect
No Connect
Reference I/P for ADC
Analog GND
Analog GND
No Connect
Bandgap Output Voltage
2*Bandgap Output Voltage
Analog VDD
5
2050A–DVD–07/02
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