PRELIMINARY
‡
32, 64, 128 MEG x 16/18
RAMBUS RIMM MODULES
RAMBUS
®
RIMM
™
MODULE
FEATURES
• 184-pin RIMM module with 1mm pad spacing
• 64MB (32 Meg x 16/18), 128MB (64 Meg x 16/18),
256MB (128 Meg x 16/18)
• Uses (4, 8, or 16) 8 Meg x 16/18 RDRAM
®
devices
• High-speed 300 MHz, 356 MHz, and 400 MHz
clocks with 2x data rates
• 1.6 GB/s peak I/O bandwidth at 400 MHz clock rate
• Packet-oriented Rambus protocol transmitted in
8-bit long packets
• Separate control and data buses for increased data
bandwidth capability
• Control bus with separate row and column buses
for easier command scheduling
• Programmable output delay timing for round-trip
delay of one to five cycles
• Write buffer to reduce READ latency
• Three precharge mechanisms for controller
flexibility
• Programmable power states for flexibility in power
consumption versus data access time
• Power-down Self Refresh and active refresh
• 32ms, 16,384 cycle refresh
• 2.5V power supply
• Serial Presence Detect (SPD)
MT4VR3216A, MT4VR3218A, MT8VR6416A,
MT8VR6418A, MT16VR12816A,
MT16VR12818A
For the latest data sheet revisions, please refer to the Micron
Web site:
www.micronsemi.com/datasheets/modds.html
PIN ASSIGNMENT
184-PIN RIMM MODULE
PIN
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
FRONT
GND
LDQA8*
GND
LDQA6
GND
LDQA4
GND
LDQA2
GND
LDQA0
GND
LCTMN
GND
LCTM
GND
NC
GND
LROW1
GND
LCOL4
GND
LCOL2
GND
LCOL0
GND
LDQB1
GND
LDQB3
GND
LDQB5
GND
LDQB7
GND
LSCK
V
CMOS
SOUT
V
CMOS
NC
GND
NC
V
DD
V
DD
NC
NC
NC
NC
P I N BACK
B1
GND
B2
LDQA7
B3
GND
B4
LDQA5
B5
GND
B6
LDQA3
B7
GND
B8
LDQA1
B9
GND
B10
LCFM
B11
GND
B12 LCFMN
B13
GND
B14
NC
B15
GND
B16 LROW2
B17
GND
B18 LROW0
B19
GND
B20
LCOL3
B21
GND
B22
LCOL1
B23
GND
B24 LDQB0
B25
GND
B26 LDQB2
B27
GND
B28 LDQB4
B29
GND
B30 LDQB6
B31
GND
B32 LDQB8*
B33
GND
B34
LCMD
B35
V
CMOS
B36
SIN
B37
V
CMOS
B38
NC
B39
GND
B40
NC
B41
V
DD
B42
V
DD
B43
NC
B44
NC
B45
NC
B46
NC
PIN
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
FRONT
NC
NC
NC
NC
V
REF
GND
SCL
V
DD
SDA
SV
DD
SWP
V
DD
RSCK
GND
RDQB7
GND
RDQB5
GND
RDQB3
GND
RDQB1
GND
RCOL0
GND
RCOL2
GND
RCOL4
GND
RROW1
GND
NC
GND
RCTM
GND
RCTMN
GND
RDQA0
GND
RDQA2
GND
RDQA4
GND
RDQA6
GND
RDQA8*
GND
PIN
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
BACK
NC
NC
NC
NC
V
REF
GND
SA0
V
DD
SA1
SV
DD
SA2
V
DD
RCMD
GND
RDQB8*
GND
RDQB6
GND
RDQB4
GND
RDQB2
GND
RDQB0
GND
RCOL1
GND
RCOL3
GND
RROW0
GND
RROW2
GND
NC
GND
RCFMN
GND
RCFM
GND
RDQA1
GND
RDQA3
GND
RDQA5
GND
RDQA7
GND
OPTIONS
• Package
184-pin RIMM module (gold)
MARKING
G
• Timing (Cycle Time)
300 MHz Clock Rate, Access Time = 53ns
356 MHz Clock Rate, Access Time = 50ns
356 MHz Clock Rate, Access Time = 45ns
400 MHz Clock Rate, Access Time = 45ns
400 MHz Clock Rate, Access Time = 40ns
-653
-750
-745
-845
-840
*Nonfunctional on x16 devices.
32, 48, 64, 128 Meg x 16/18 Rambus RIMM Modules
RM01_B.p65 – Rev. B; Pub. 11/00
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
‡ PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE
SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S
PRODUCTION DATA SHEET SPECIFICATIONS.
PRELIMINARY
32, 64, 128 MEG x 16/18
RAMBUS RIMM MODULES
GENERAL DESCRIPTION
The MT4VR3216/18A, MT8VVR6416/18A and
MT16VVR12816/18A RDRAM RIMM modules are gen-
eral-purpose, high-performance, packet-oriented, dy-
namic random-access memories configured as 64MB/
72MB, 128/144MB, and 256MB/288MB densities. The
RIMM modules consist of 4, 8, or 16 Direct RDRAM
devices organized as 8 words by 16 or 18 bits.
The RIMM modules use Rambus signaling level
(RSL) technology to achieve 300 MHz, 356 MHz, or 400
MHz clock speeds using differential clocks. Control and
I/O data is transferred on both the rising and falling
edges of the clock. This allows data transfers at 1.25ns
per two bytes (10ns per 16 bytes) during peak opera-
tion.
All DRAM commands are communicated to the
RIMM modules through a 3-bit row or 5-bit column bus
in packets which are 8 bits in length. These packets are
then decoded on the RDRAM into the operation and
address requiring access.
Initialization and mode configurations for the RIMM
modules are accessed through slow speed CMOS Serial
I/O interface.
The architecture of Direct RDRAMs allows high sus-
tained bandwidth memory transactions for multiple,
simultaneous, semi-random addresses. Each Direct
RDRAM’s thirty-two banks can support up to four si-
multaneous transactions (within bank restrictions).
System-oriented features include power manage-
ment, byte masking and x16/18 organization. The two
data bits in the x18 organization are general and can be
used for additional storage, bandwidth, or for error
correction.
PART NUMBERS
PART NUMBER
MT4VR3216AG-653__
MT4VR3216AG-750__
MT4VR3216AG-745__
MT4VR3216AG-845__
MT4VR3216AG-840__
MT4VR3218AG-653__
MT4VR3218AG-750__
MT4VR3218AG-745__
MT4VR3218AG-845__
MT4VR3218AG-840__
MT8VR6416AG-653__
MT8VR6416AG-750__
MT8VR6416AG-745__
MT8VR6416AG-845__
MT8VR6416AG-840__
MT8VR6418AG-653__
MT8VR6418AG-750__
MT8VR6418AG-745__
MT8VR6418AG-845__
MT8VR6418AG-840__
MT16VR12816AG-653__
MT16VR12816AG-750__
MT16VR12816AG-745__
MT16VR12816AG-845__
MT16VR12816AG-840__
MT16VR12818AG-653__
MT16VR12818AG-750__
MT16VR12818AG-745__
MT16VR12818AG-845__
MT16VR12818AG-840__
CONFIGURATION CLK FREQ. ACCESS
(MHz) TIME (ns)
32 Meg x 16
300
53
32 Meg x 16
356
50
32 Meg x 16
356
45
32 Meg x 16
400
45
32 Meg x 16
400
40
32 Meg x 18
300
53
32 Meg x 18
356
50
32 Meg x 18
356
45
32 Meg x 18
400
45
32 Meg x 18
400
40
64 Meg x 16
300
53
64 Meg x 16
356
50
64 Meg x 16
356
45
64 Meg x 16
400
45
64 Meg x 16
400
40
64 Meg x 18
300
53
64 Meg x 18
356
50
64 Meg x 18
356
45
64 Meg x 18
400
45
64 Meg x 18
400
40
128 Meg x 16
300
53
128 Meg x 16
356
50
128 Meg x 16
356
45
128 Meg x 16
400
45
128 Meg x 16
400
40
128 Meg x 18
300
53
128 Meg x 18
356
50
128 Meg x 18
356
45
128 Meg x 18
400
45
128 Meg x 18
400
40
NOTE:
All part numbers end with a two-place code (not
shown), designating component and PCB revisions.
Consult factory for current revision codes. Example:
MT8VR6416AG-750B1
32, 48, 64, 128 Meg x 16/18 Rambus RIMM Modules
RM01_B.p65 – Rev. B; Pub. 11/00
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
PRELIMINARY
32, 64, 128 MEG x 16/18
RAMBUS RIMM MODULES
FUNCTIONAL BLOCK DIAGRAM
LCFM
LCFMN
LCTM
LCTMN
LROW2..0
LCOL4..0
LDQA8..0
LDQB8..0
LCFM
LCFMN
LCTM
LCTMN
LROW2..0
LCOL4..0
LDQA8..0
LDQB8..0
DECOUPLING
U0
SIO0
SIO1
SCK
CMD
V
REF
SIN
LSCK
LCMD
V
REF
V
DD
RDRAM
0.1µF
0.1µF
GND
Two 0.1µF per RDRAM
LCFM
LCFMN
LCTM
LCTMN
LROW2..0
LCOL4..0
LDQA8..0
LDQB8..0
U1
SIO0
SIO1
SCK
CMD
V
REF
V
REF
RDRAM
RDRAM
0.1µF
GND
One 0.1µF per two RDRAMs
LCFM
LCFMN
LCTM
LCTMN
LROW2..0
LCOL4..0
LDQA8..0
LDQB8..0
V
CMOS
RDRAM
RDRAM
U2
SIO0
SIO1
SCK
CMD
V
REF
0.1µF
GND
One 0.1µF per two RDRAM
Serial Presence Detect (SPD)
SCL
SWP
47K
GND
SCL
WP
A0
A1
SDA
V
CC
A2
SDA
SV
DD
0.1µF
SA0 SA1 SA2
GND
RCFM
RCFMN
RCTM
RCTMN
RROW2..0
RCOL4..0
RDQA8..0
RDQB8..0
LCFM
LCFMN
LCTM
LCTMN
LROW2..0
LCOL4..0
LDQA8..0
LDQB8..0
MODULE
CAPACITY
N
16
8
4
UN
SIO0
SIO1
SCK
CMD
V
REF
SOUT
RSCK
RCMD
V
REF
0.1µF
256MB
128MB
64MB
NOTE:
1. Rambus channel signals form a loop through the
RIMM module, with the exception of the SIO chain.
GND
32, 48, 64, 128 Meg x 16/18 Rambus RIMM Modules
RM01_B.p65 – Rev. B; Pub. 11/00
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
PRELIMINARY
32, 64, 128 MEG x 16/18
RAMBUS RIMM MODULES
PIN DESCRIPTIONS
PIN NUMBERS
B10
B12
A20, B20, A22, B22, A24
A14
A12
B16, A18, B18
B83
B81
A73, B73, A71, B71, A69
A79
A81
B77, A75, B75
B53
B55
B57
A53
A57
B34
A34
B59
SYMBOL
LCFM
LCFMN
LCOL4–
LCOL0
LCTM
LCTMN
LROW2–
LROW0
RCFM
RCFMN
RCOL4–
RCOL0
RCTM
RCTMN
RROW2–
RROW0
SA0
SA1
SA2
SCL
SWP
LCMD
LSCK
RCMD
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
TYPE
RSL
RSL
RSL
RSL
RSL
RSL
RSL
RSL
RSL
RSL
RSL
RSL
SV
DD
SV
DD
SV
DD
SV
DD
SV
DD
V
CMOS
V
CMOS
V
CMOS
DESCRIPTION
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Positive polarity.
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Negative polarity.
Column Bus. 5-bit bus containing control and address
information for column accesses.
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Positive polarity.
Clock to Master. Interface clock used for transmitting
RSL signals to the Channel. Negative polarity.
Row Bus. 3-bit bus containing control and address
information for row accesses.
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Positive polarity.
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Negative polarity.
Column Bus. 5-bit bus containing control and address
information for Column accesses.
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Positive polarity.
Clock to master. Interface clock used for transmitting
RSL signals from the Channel. Negative polarity.
Row Bus. 3-bit bus containing control and address
information for row accesses.
Serial Presence Detect Address 0
Serial Presence Detect Address 1
Serial Presence Detect Address 2
Serial Presence Detect Clock.
Serial Presence Detect Write Protect (active high).
When low, the SPD can be written as well as read.
Serial Command used to read from and write to the
control registers. Also used for power management.
Serial Clock Input. Clock source used to read from
and write to the RDRAM control registers.
Serial Command Input used to read from and write to
the control registers. Also used for power manage-
ment.
Serial Clock Input. Clock source used to read from
and write to the RDRAM control registers.
A59
RSCK
I
V
CMOS
(Continued on the next page)
32, 48, 64, 128 Meg x 16/18 Rambus RIMM Modules
RM01_B.p65 – Rev. B; Pub. 11/00
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
PRELIMINARY
32, 64, 128 MEG x 16/18
RAMBUS RIMM MODULES
PIN DESCRIPTIONS (continued)
PIN NUMBERS
A2, B2, A4, B4, A6, B6,
A8, B8, A10
B32, A32, B30, A30, B28,
A28, B26, A26, B24
A91, B91, A89, B89, A87,
B87, A85, B85, A83
B61, A61, B63, A63, B65,
A65, B67, A67, B69
A55
B36
SYMBOL
LDQA8–
LDQA0
LDQB8–
LDQB0
RDQA8–
RDQA0
RDQB8–
RDQB0
SDA
SIN
I/O
I/O
TYPE
RSL
DESCRIPTION
Data Bus A. A 9-bit bus carrying a byte of read or
write data between the Channel and the RDRAM.
LDQA8 is non-functional on x16 modules.
Data Bus B. A 9-bit bus carrying a byte of read or
write data between the Channel and the RDRAM.
LDQB8 is non-functional on x16 modules.
Data Bus A. A 9-bit bus carrying a byte of read or
write data between the Channel and the RDRAM.
RDQA8 is non-functional on x16 modules.
Data Bus B. A 9-bit bus carrying a byte of read or
writedata between the Channel and the RDRAM.
RDQB8 is non-functional on x16 modules.
Serial Presence Detect Data (Open Collector I/O).
Serial I/O for reading from and writing to the control
registers. Attaches to SIO0 of the first RDRAM on the
module.
Serial I/O for reading from and writing to the control
registers. Attaches to SIO1 of the last RDRAM on the
module.
CMOS I/O Voltage. Used for signals CMD, SCK, S
IN
,
and S
OUT
.
Supply voltage for the RDRAM core and interface
logic.
SPD voltage. Used for signals SCL, SDA, SWE, SA0,
SA1, and SA2.
Logic threshold reference voltage for RSL signals.
Ground reference for RDRAM core and interface.
I/O
RSL
I/O
RSL
I/O
RSL
I/O
I/O
SV
DD
V
CMOS
A36
S
OUT
I/O
V
CMOS
A35, B35, A37, B37
A41, A42, A54, A58,
B41, B42, B54, B58
A56, B56
A51, B51
A1, A3, A5, A7, A9, A11,
A13, A15, A17, A19, A21,
A23, A25, A27, A29, A31,
A33, A39, A52, A60, A62,
A64, A66, A68, A70, A72,
A74, A76, A78, A80, A82,
A84, A86, A88, A90, A92,
B1, B3, B5, B7, B9, B11,
B13, B15, B17, B19, B21,
B23, B25, B27, B29, B31,
B33, B39, B52, B60, B62,
B64, B66, B68, B70, B72,
B74, B76, B78, B80, B82,
B84, B86, B88, B90, B92
A16, A38, A40, A43, A44,
A45, A46, A47, A48, A49,
A50, A77, B43, B44, B45,
B46, B47, B48, B49, B50,
A77, B14, B38, B40, B79
V
CMOS
V
DD
SV
DD
V
REF
GND
NC
No Connection. These 24 pins are all reserved for
future use.
32, 48, 64, 128 Meg x 16/18 Rambus RIMM Modules
RM01_B.p65 – Rev. B; Pub. 11/00
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
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